reset.vhd

用VHDL进行DSP5416开发板的复位 用VHDL进行DSP5416开发板的复位

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-- FILE NAME    : reset.vhd 
-- TITLE        : Reset Circuitry 
-- DESCRIPTION  : This module contains the control of the reset lines 
--                for the DSK. 
-- NOTES        : Active low signals are indicated with  '_l ' appended 
--                to the signal name. 
--                All internal registers are active high. 
---------------------------------------------------------------------- 
-- REVISION HISTORY : 
-- 
-- REV   DATE       DESCRIPTION                         AUTHOR 
-- ===   ========   =================================   ================ 
--  0     01/09/01  Original Release 
-- 
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LIBRARY IEEE; 
USE IEEE.STD_LOGIC_1164 .ALL; 

ENTITY reset IS 
  PORT(board_reset_l       : IN STD_LOGIC; -- board reset from tps3707 
    button_reset_l       : IN STD_LOGIC; -- reset from push button 
    dc_reset_reg         : IN STD_LOGIC; -- db reset register  (dsp) 
        db_vcc_bad_l         : IN STD_LOGIC; -- 3.3b db monitor 
        usb_dsp_reset_l      : IN STD_LOGIC; -- usb reset from pci host intf. 
    emu_sel        : IN STD_LOGIC; -- Emulation select (JTAG or on-board) 

        reset_strobe_l       : OUT STD_LOGIC; -- reset strobe to tps3707 
        dc_reset_l           : OUT STD_LOGIC);-- reset to dc 
END reset; 

ARCHITECTURE rtl OF reset IS 

BEGIN 
---------------------------------------------------------------------- 
-- Reset strobe is input to the reset pulse width generator used for 
-- reseting the board.  The reset strobe is generated from any one 
-- of the following: 
-- A) pushbutton switch (button_reset_l ) 
-- B) USB host software initiated reset (usb_dsp_reset_l) 
---------------------------------------------------------------------- 
create_reset_strobe : PROCESS(button_reset_l , usb_dsp_reset_l, emu_sel) 
BEGIN 
      IF ((button_reset_l = '0') OR (usb_dsp_reset_l = '0' AND emu_sel = '1')) THEN 
      reset_strobe_l <= '0'; 
      ELSE 
      reset_strobe_l <= '1'; 
      END IF; 
END PROCESS create_reset_strobe ; 

---------------------------------------------------------------------- 
-- Daughter board reset assignments. The daughter board gets reset by 
-- any one of the following: 
-- A) pulse controlled board reset (board_reset_l) 
-- B) DSP control register, tbc reset bit  (db_reset_reg) 
-- C) 3.3v db monitor supervisory circuit (db_vcc_bad_l) 
---------------------------------------------------------------------- 
  dc_reset_l <= board_reset_l AND  (NOT dc_reset_reg) AND db_vcc_bad_l; 

END rtl;