ex98.vhd

来自「近百个vhdl的器件编程,虽然个别较为简单,但都很实用,对于初学者会有很大帮助」· VHDL 代码 · 共 17 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY EX98 IS
		PORT(
        si      : in integer range 0 to 15;
		sig	    : OUT integer range 0 to 15);
END EX98;
ARCHITECTURE a OF EX98 IS
	BEGIN
	   sig <=si after 200 ns;
	END a;