decoder.fit.eqn

可以对输入时钟任意分频(整数或小数),带Quartus II 完整项目文件.

--operation mode is arithmetic

F1_safe_q[5]_carry_eqn = (!F1L11 & GND) # (F1L11 & VCC);
F1_safe_q[5]_lut_out = F1_safe_q[5] $ F1_safe_q[5]_carry_eqn;
F1_safe_q[5]_reg_input = !B1L63 & F1_safe_q[5]_lut_out;
F1_safe_q[5] = DFFEA(F1_safe_q[5]_reg_input, !GLOBAL(D1L1), GLOBAL(reset), , , , );

--F1L43 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5]~COUT0 at LC_X16_Y6_N5
--operation mode is arithmetic

F1L43_cout_0 = !F1L11 # !F1_safe_q[5];
F1L43 = CARRY(F1L43_cout_0);

--F1L53 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[5]~COUT1 at LC_X16_Y6_N5
--operation mode is arithmetic

F1L53_cout_1 = !F1L11 # !F1_safe_q[5];
F1L53 = CARRY(F1L53_cout_1);


--F1_safe_q[4] is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[4] at LC_X16_Y6_N4
--operation mode is arithmetic

F1_safe_q[4]_lut_out = F1_safe_q[4] $ !F1L82;
F1_safe_q[4]_reg_input = !B1L63 & F1_safe_q[4]_lut_out;
F1_safe_q[4] = DFFEA(F1_safe_q[4]_reg_input, !GLOBAL(D1L1), GLOBAL(reset), , , , );

--F1L11 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|counter_cell[4]~COUT at LC_X16_Y6_N4
--operation mode is arithmetic

F1L11 = F1L13;


--F1_safe_q[3] is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3] at LC_X16_Y6_N3
--operation mode is arithmetic

F1_safe_q[3]_lut_out = F1_safe_q[3] $ F1L52;
F1_safe_q[3]_reg_input = !B1L63 & F1_safe_q[3]_lut_out;
F1_safe_q[3] = DFFEA(F1_safe_q[3]_reg_input, !GLOBAL(D1L1), GLOBAL(reset), , , , );

--F1L82 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3]~COUT0 at LC_X16_Y6_N3
--operation mode is arithmetic

F1L82_cout_0 = !F1L52 # !F1_safe_q[3];
F1L82 = CARRY(F1L82_cout_0);

--F1L92 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[3]~COUT1 at LC_X16_Y6_N3
--operation mode is arithmetic

F1L92_cout_1 = !F1L62 # !F1_safe_q[3];
F1L92 = CARRY(F1L92_cout_1);


--F1_safe_q[2] is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2] at LC_X16_Y6_N2
--operation mode is arithmetic

F1_safe_q[2]_lut_out = F1_safe_q[2] $ !F1L22;
F1_safe_q[2]_reg_input = !B1L63 & F1_safe_q[2]_lut_out;
F1_safe_q[2] = DFFEA(F1_safe_q[2]_reg_input, !GLOBAL(D1L1), GLOBAL(reset), , , , );

--F1L52 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2]~COUT0 at LC_X16_Y6_N2
--operation mode is arithmetic

F1L52_cout_0 = F1_safe_q[2] & !F1L22;
F1L52 = CARRY(F1L52_cout_0);

--F1L62 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[2]~COUT1 at LC_X16_Y6_N2
--operation mode is arithmetic

F1L62_cout_1 = F1_safe_q[2] & !F1L32;
F1L62 = CARRY(F1L62_cout_1);


--F1_safe_q[1] is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1] at LC_X16_Y6_N1
--operation mode is arithmetic

F1_safe_q[1]_lut_out = F1_safe_q[1] $ F1L91;
F1_safe_q[1]_reg_input = !B1L63 & F1_safe_q[1]_lut_out;
F1_safe_q[1] = DFFEA(F1_safe_q[1]_reg_input, !GLOBAL(D1L1), GLOBAL(reset), , , , );

--F1L22 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1]~COUT0 at LC_X16_Y6_N1
--operation mode is arithmetic

F1L22_cout_0 = !F1L91 # !F1_safe_q[1];
F1L22 = CARRY(F1L22_cout_0);

--F1L32 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[1]~COUT1 at LC_X16_Y6_N1
--operation mode is arithmetic

F1L32_cout_1 = !F1L02 # !F1_safe_q[1];
F1L32 = CARRY(F1L32_cout_1);


--F1_safe_q[0] is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0] at LC_X16_Y6_N0
--operation mode is arithmetic

F1_safe_q[0]_lut_out = !F1_safe_q[0];
F1_safe_q[0]_reg_input = !B1L63 & F1_safe_q[0]_lut_out;
F1_safe_q[0] = DFFEA(F1_safe_q[0]_reg_input, !GLOBAL(D1L1), GLOBAL(reset), , , , );

--F1L91 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0]~COUT0 at LC_X16_Y6_N0
--operation mode is arithmetic

F1L91_cout_0 = F1_safe_q[0];
F1L91 = CARRY(F1L91_cout_0);

--F1L02 is fenpin:inst|lpm_counter:count_rtl_0|alt_counter_stratix:wysi_counter|safe_q[0]~COUT1 at LC_X16_Y6_N0
--operation mode is arithmetic

F1L02_cout_1 = F1_safe_q[0];
F1L02 = CARRY(F1L02_cout_1);


--B1_clk_1 is fenpin:inst|clk_1 at LC_X15_Y6_N6
--operation mode is normal

B1_clk_1_lut_out = vel[0] & !B1L43 # !vel[0] & (B1L001 & B1L43 # !B1L501);
B1_clk_1 = DFFEA(B1_clk_1_lut_out, !GLOBAL(D1L1), GLOBAL(reset), , , , );


--B1_clk_t is fenpin:inst|clk_t at LC_X16_Y3_N6
--operation mode is normal

B1_clk_t_lut_out = B1_clk_t & B1L021 # !B1L521;
B1_clk_t = DFFEA(B1_clk_t_lut_out, GLOBAL(D1L1), GLOBAL(reset), , vel[1], , );


--B1L33 is fenpin:inst|i14~42 at LC_X16_Y3_N1
--operation mode is normal

B1L33 = B1_clk_1 & (B1_clk_t # vel[0] # !vel[1]);


--B1L69 is fenpin:inst|i~352 at LC_X18_Y6_N8
--operation mode is normal

B1L69 = B1L26 & (B1L64 $ F1_safe_q[2] # !F1_safe_q[6]) # !B1L26 & (F1_safe_q[6] # B1L64 $ F1_safe_q[2]);


--B1L79 is fenpin:inst|i~353 at LC_X17_Y6_N2
--operation mode is normal

B1L79 = B1L05 & (B1L45 $ F1_safe_q[4] # !F1_safe_q[3]) # !B1L05 & (F1_safe_q[3] # B1L45 $ F1_safe_q[4]);


--B1L89 is fenpin:inst|i~354 at LC_X17_Y6_N0
--operation mode is normal

B1L89 = B1L83 & (F1_safe_q[5] $ B1L85 # !F1_safe_q[0]) # !B1L83 & (F1_safe_q[0] # F1_safe_q[5] $ B1L85);


--B1L99 is fenpin:inst|i~355 at LC_X17_Y6_N6
--operation mode is normal

B1L99 = B1L24 & (F1_safe_q[7] $ B1L66 # !F1_safe_q[1]) # !B1L24 & (F1_safe_q[1] # F1_safe_q[7] $ B1L66);


--B1L001 is fenpin:inst|i~356 at LC_X17_Y6_N5
--operation mode is normal

B1L001 = B1L99 # B1L89 # B1L79 # B1L69;


--B1L101 is fenpin:inst|i~357 at LC_X16_Y5_N8
--operation mode is normal

B1L101 = B1L19 & (B1L57 $ F1_safe_q[2] # !F1_safe_q[6]) # !B1L19 & (F1_safe_q[6] # B1L57 $ F1_safe_q[2]);


--B1L201 is fenpin:inst|i~358 at LC_X16_Y5_N5
--operation mode is normal

B1L201 = B1L38 & (B1L97 $ F1_safe_q[3] # !F1_safe_q[4]) # !B1L38 & (F1_safe_q[4] # B1L97 $ F1_safe_q[3]);


--B1L301 is fenpin:inst|i~359 at LC_X16_Y5_N2
--operation mode is normal

B1L301 = B1L76 & (B1L78 $ F1_safe_q[5] # !F1_safe_q[0]) # !B1L76 & (F1_safe_q[0] # B1L78 $ F1_safe_q[5]);


--B1L401 is fenpin:inst|i~360 at LC_X16_Y5_N9
--operation mode is normal

B1L401 = B1L17 & (B1L59 $ F1_safe_q[7] # !F1_safe_q[1]) # !B1L17 & (F1_safe_q[1] # B1L59 $ F1_safe_q[7]);


--B1L501 is fenpin:inst|i~361 at LC_X16_Y5_N6
--operation mode is normal

B1L501 = B1L401 # B1L101 # B1L301 # B1L201;


--B1L601 is fenpin:inst|i~362 at LC_X15_Y6_N1
--operation mode is normal

B1L601 = vel[7] & (vel[3] $ F1_safe_q[2] # !F1_safe_q[6]) # !vel[7] & (F1_safe_q[6] # vel[3] $ F1_safe_q[2]);


--B1L701 is fenpin:inst|i~363 at LC_X17_Y6_N3
--operation mode is normal

B1L701 = vel[5] & (vel[4] $ F1_safe_q[3] # !F1_safe_q[4]) # !vel[5] & (F1_safe_q[4] # vel[4] $ F1_safe_q[3]);


--B1L801 is fenpin:inst|i~364 at LC_X17_Y6_N9
--operation mode is normal

B1L801 = vel[6] & (F1_safe_q[0] $ vel[1] # !F1_safe_q[5]) # !vel[6] & (F1_safe_q[5] # F1_safe_q[0] $ vel[1]);


--B1L901 is fenpin:inst|i~365 at LC_X17_Y6_N1
--operation mode is normal

B1L901 = vel[8] & (vel[2] $ F1_safe_q[1] # !F1_safe_q[7]) # !vel[8] & (F1_safe_q[7] # vel[2] $ F1_safe_q[1]);


--B1L011 is fenpin:inst|i~366 at LC_X17_Y6_N8
--operation mode is normal

B1L011 = B1L901 # B1L701 # B1L801 # B1L601;


--B1L111 is fenpin:inst|i~367 at LC_X15_Y6_N7
--operation mode is normal

B1L111 = F1_safe_q[7] # vel[7] $ F1_safe_q[5];


--B1L211 is fenpin:inst|i~368 at LC_X15_Y6_N4
--operation mode is normal

B1L211 = vel[5] & (vel[4] $ F1_safe_q[2] # !F1_safe_q[3]) # !vel[5] & (F1_safe_q[3] # vel[4] $ F1_safe_q[2]);


--B1L311 is fenpin:inst|i~369 at LC_X15_Y6_N9
--operation mode is normal

B1L311 = vel[6] & (vel[3] $ F1_safe_q[1] # !F1_safe_q[4]) # !vel[6] & (F1_safe_q[4] # vel[3] $ F1_safe_q[1]);


--B1L411 is fenpin:inst|i~370 at LC_X15_Y6_N0
--operation mode is normal

B1L411 = vel[8] & (vel[2] $ F1_safe_q[0] # !F1_safe_q[6]) # !vel[8] & (F1_safe_q[6] # vel[2] $ F1_safe_q[0]);


--B1L511 is fenpin:inst|i~371 at LC_X15_Y6_N8
--operation mode is normal

B1L511 = B1L311 # B1L411 # B1L211 # B1L111;


--B1L43 is fenpin:inst|i97~104 at LC_X15_Y6_N5
--operation mode is normal

B1L43 = B1_clk_1 & (B1L511 & !B1L011 # !vel[0]) # !B1_clk_1 & vel[0] & B1L511;


--B1L621Q is fenpin:inst|xor_clk~reg0 at LC_X15_Y6_N3
--operation mode is normal

B1L621Q_lut_out = !B1L621Q;
B1L621Q = DFFEA(B1L621Q_lut_out, B1_clk_1, VCC, , vel[0], , );


--D1L1 is switch:inst7|i4~55 at LC_X15_Y6_N2
--operation mode is normal

D1L1 = clk $ (!vel[0] # !B1L621Q);


--B1L611 is fenpin:inst|i~372 at LC_X16_Y3_N3
--operation mode is normal

B1L611 = vel[3] & (vel[7] $ B1_cnt[6] # !B1_cnt[2]) # !vel[3] & (B1_cnt[2] # vel[7] $ B1_cnt[6]);


--B1L711 is fenpin:inst|i~373 at LC_X16_Y3_N7
--operation mode is normal

B1L711 = vel[5] & (vel[4] $ B1_cnt[3] # !B1_cnt[4]) # !vel[5] & (B1_cnt[4] # vel[4] $ B1_cnt[3]);


--B1L811 is fenpin:inst|i~374 at LC_X16_Y3_N2
--operation mode is normal

B1L811 = vel[6] & (B1_cnt[0] $ vel[1] # !B1_cnt[5]) # !vel[6] & (B1_cnt[5] # B1_cnt[0] $ vel[1]);


--B1L911 is fenpin:inst|i~375 at LC_X18_Y3_N6
--operation mode is normal

B1L911 = vel[8] & (vel[2] $ B1_cnt[1] # !B1_cnt[7]) # !vel[8] & (B1_cnt[7] # vel[2] $ B1_cnt[1]);


--B1L021 is fenpin:inst|i~376 at LC_X17_Y3_N8
--operation mode is normal

B1L021 = B1L911 # B1L711 # B1L611 # B1L811;


--B1L121 is fenpin:inst|i~377 at LC_X16_Y3_N8
--operation mode is normal

B1L121 = B1_cnt[7] # B1_cnt[5] $ vel[7];


--B1L221 is fenpin:inst|i~378 at LC_X16_Y3_N4
--operation mode is normal

B1L221 = vel[5] & (vel[4] $ B1_cnt[2] # !B1_cnt[3]) # !vel[5] & (B1_cnt[3] # vel[4] $ B1_cnt[2]);


--B1L321 is fenpin:inst|i~379 at LC_X16_Y3_N9
--operation mode is normal

B1L321 = vel[3] & (B1_cnt[4] $ vel[6] # !B1_cnt[1]) # !vel[3] & (B1_cnt[1] # B1_cnt[4] $ vel[6]);


--B1L421 is fenpin:inst|i~380 at LC_X16_Y3_N0
--operation mode is normal

B1L421 = vel[8] & (vel[2] $ B1_cnt[0] # !B1_cnt[6]) # !vel[8] & (B1_cnt[6] # vel[2] $ B1_cnt[0]);


--B1L521 is fenpin:inst|i~381 at LC_X16_Y3_N5
--operation mode is normal

B1L521 = B1L321 # B1L421 # B1L121 # B1L221;


--B1L53 is fenpin:inst|i105~110 at LC_X16_Y6_N9
--operation mode is normal

B1L53 = B1L011 # !B1L511;


--B1L63 is fenpin:inst|i105~111 at LC_X16_Y6_N8
--operation mode is normal

B1L63 = vel[0] & !B1L53 # !vel[0] & !B1L001 & B1L501;


--B1L73 is fenpin:inst|i156~0 at LC_X17_Y3_N9
--operation mode is normal

B1L73 = B1L521 & !B1L021;


--~GND is ~GND at LC_X18_Y3_N2
--operation mode is normal

~GND = GND;


--vel[0] is vel[0] at Pin_55
--operation mode is input

vel[0] = INPUT();


--vel[1] is vel[1] at Pin_57
--operation mode is input

vel[1] = INPUT();


--vel[7] is vel[7] at Pin_54
--operation mode is input

vel[7] = INPUT();


--vel[3] is vel[3] at Pin_61
--operation mode is input

vel[3] = INPUT();


--vel[5] is vel[5] at Pin_53
--operation mode is input

vel[5] = INPUT();


--vel[4] is vel[4] at Pin_52
--operation mode is input

vel[4] = INPUT();


--vel[6] is vel[6] at Pin_58
--operation mode is input

vel[6] = INPUT();


--vel[8] is vel[8] at Pin_62
--operation mode is input

vel[8] = INPUT();


--vel[2] is vel[2] at Pin_59
--operation mode is input

vel[2] = INPUT();


--clk is clk at Pin_125
--operation mode is input

clk = INPUT();


--reset is reset at Pin_17
--operation mode is input

reset = INPUT();


--out is out at Pin_56
--operation mode is output

out = OUTPUT(B1L33);