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📄 lcd12864.v

📁 通过IIC总线读写实时时钟DS1307
💻 V
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module lcd12864(clk,nrst,
				t_sec,t_min,t_hour,
				lcd_e,lcd_rs,lcd_rw,lcd_cs1,lcd_cs2,lcd_rst,data);
input clk,nrst;                            //时钟和复位信号输入
input [7:0] t_sec,t_min,t_hour;
output lcd_e,lcd_rs,lcd_rw,lcd_cs1,lcd_cs2,lcd_rst;//lcd的控制信号
output [7:0] data; 
reg lcd_e;
reg lcd_rs;
reg lcd_cs1;
reg lcd_cs2;

reg lcd_rst;
reg [7:0] data;                        //lcd数据接口

reg[5:0] mstate;                          //主状态机
reg[7:0] cnt;    
reg[7:0] div_cnt;                         //分频 计数器
reg[7:0] column_cnt;				//column counter
reg[2:0] col_cnt_buf;
reg[2:0] row_cnt;					//row counter
wire[7:0] data_buf1	;
wire[7:0] data_buf2	;
wire[7:0] data_buf3	;
reg[3:0] dip_index;

parameter idle 			=6'b00_0000;
parameter setstrow_a	=6'b00_0001;
parameter setstrow_b	=6'b00_0010;
parameter setstrow_c	=6'b00_0011;
parameter lcdon_a		=6'b00_0100;
parameter lcdon_b		=6'b00_0101;
parameter lcdon_c		=6'b00_0110;
parameter clr_str_a		=6'b00_0111;
parameter clr_str_b		=6'b00_1000;
parameter clr_str_c		=6'b00_1001;
parameter clr_stc_a		=6'b00_1010;
parameter clr_stc_b		=6'b00_1011;
parameter clr_stc_c		=6'b00_1100;
parameter clr_dat_a		=6'b00_1101;
parameter clr_dat_b		=6'b00_1110;
parameter clr_dat_c		=6'b00_1111;
parameter setrow_a		=6'b01_0000;
parameter setrow_b		=6'b01_0001;
parameter setrow_c		=6'b01_0010;
parameter setcol_a		=6'b01_0011;
parameter setcol_b		=6'b01_0100;
parameter setcol_c		=6'b01_0101;
parameter dispchar_a	=6'b01_0110;
parameter dispchar_b	=6'b01_0111;
parameter dispchar_c	=6'b01_1000;
parameter delay         =6'b10_1010;

parameter x_offset		=50;				//DISPLAY POSITON X OFFSET

function[7:0] shuzi;
	input[6:0] n;
	begin
		case(n)
			0:shuzi=8'h3e;		//0
			1:shuzi=8'h51;
			2:shuzi=8'h49;
			3:shuzi=8'h45;
			4:shuzi=8'h3e;

			5:shuzi=8'h00;		//1
			6:shuzi=8'h42;
			7:shuzi=8'h7F;
			8:shuzi=8'h40;
			9:shuzi=8'h00;

			10:shuzi=8'h42;		//2
			11:shuzi=8'h61;
			12:shuzi=8'h51;
			13:shuzi=8'h49;
			14:shuzi=8'h66;

			15:shuzi=8'h23;		//3
			16:shuzi=8'h41;
			17:shuzi=8'h45;
			18:shuzi=8'h4B;
			19:shuzi=8'h31;

			20:shuzi=8'h18;		//4
			21:shuzi=8'h14;
			22:shuzi=8'h52;
			23:shuzi=8'h7F;
			24:shuzi=8'h50;

			25:shuzi=8'h27;		//5
			26:shuzi=8'h45;
			27:shuzi=8'h45;
			28:shuzi=8'h45;
			29:shuzi=8'h39;

			30:shuzi=8'h3C;		//6
			31:shuzi=8'h4A;
			32:shuzi=8'h49;
			33:shuzi=8'h49;
			34:shuzi=8'h30;

			35:shuzi=8'h03;		//7
			36:shuzi=8'h71;
			37:shuzi=8'h09;
			38:shuzi=8'h05;
			39:shuzi=8'h03;

			40:shuzi=8'h36;		//8
			41:shuzi=8'h49;
			42:shuzi=8'h49;
			43:shuzi=8'h49;
			44:shuzi=8'h36;

			45:shuzi=8'h06;		//9
			46:shuzi=8'h49;
			47:shuzi=8'h49;
			48:shuzi=8'h29;
			49:shuzi=8'h1E;

			50:shuzi=8'h00;		//:
			51:shuzi=8'h36;
			52:shuzi=8'h36;
			53:shuzi=8'h00;
			54:shuzi=8'h00;

			default:shuzi=8'h00;
		endcase
	end
endfunction

assign data_buf1 = t_sec;
assign data_buf2 = t_min;
assign data_buf3 = t_hour;

always@(column_cnt or data_buf3 or data_buf2 or data_buf1)
begin
	case(column_cnt)
		0:dip_index <= data_buf3[7:4];
		1:dip_index <= data_buf3[7:4];
		2:dip_index <= data_buf3[7:4];
		3:dip_index <= data_buf3[7:4];
		4:dip_index <= data_buf3[7:4];
		5:dip_index <= data_buf3[3:0];
		6:dip_index <= data_buf3[3:0];
		7:dip_index <= data_buf3[3:0];
		8:dip_index <= data_buf3[3:0];
		9:dip_index <= data_buf3[3:0];

		15:dip_index <= data_buf2[7:4];
		16:dip_index <= data_buf2[7:4];
		17:dip_index <= data_buf2[7:4];
		18:dip_index <= data_buf2[7:4];
		19:dip_index <= data_buf2[7:4];
		20:dip_index <= data_buf2[3:0];
		21:dip_index <= data_buf2[3:0];
		22:dip_index <= data_buf2[3:0];
		23:dip_index <= data_buf2[3:0];
		24:dip_index <= data_buf2[3:0];

		30:dip_index <= data_buf1[7:4];
		31:dip_index <= data_buf1[7:4];
		32:dip_index <= data_buf1[7:4];
		33:dip_index <= data_buf1[7:4];
		34:dip_index <= data_buf1[7:4];
		35:dip_index <= data_buf1[3:0];
		36:dip_index <= data_buf1[3:0];
		37:dip_index <= data_buf1[3:0];
		38:dip_index <= data_buf1[3:0];
		39:dip_index <= data_buf1[3:0];
		default:dip_index <= 10;
	endcase	
end

always @(posedge clk or posedge nrst)
begin
     if(nrst)
     div_cnt<=16'b0_0000_0000_0000_0000;
     else
     div_cnt<=div_cnt+1;
end

assign clk_div = div_cnt[7];

//////////////////////////////////////////DISPLAY Control///////////////////////////////
assign lcd_rw  =0;

always @(posedge clk_div or posedge nrst)
begin
   if(nrst)
     begin
     mstate<=idle;
     cnt<=8'b1000_1000;
     end
   else
     casex(mstate)
			idle  :        begin
                              lcd_rs<=0;
                              lcd_e <=0;
                              data  <=0;

                              if(!cnt)
                               begin
                               mstate<=setstrow_a;
                               lcd_rst<=1;
                               end
                              else
                               begin
                               cnt<=cnt-1;
                               lcd_rst<=0;               //复位lcd
                               mstate<=idle;
                               end
							end
///////////////////////////initial lcd/////////////////////////////////////////////////////
			setstrow_a	:	begin
								mstate<=setstrow_b;    //set display start row
								lcd_rs<=0;
								lcd_e <=0;
								data  <=8'b1100_0000;	//0xc0
								{lcd_cs1,lcd_cs2} <= 2'b11;			//panel select
							end
			setstrow_b	:	begin
								mstate<=setstrow_c;
								lcd_rs<=0;
								lcd_e<=1;
							end
			setstrow_c	:	begin
								mstate<=lcdon_a;    
//								mstate<=delay;    
								lcd_rs<=0;
								lcd_e<=0;
							end
							
			lcdon_a		:	begin
								mstate<=lcdon_b;    
								lcd_rs<=0;
								lcd_e <=0;
								data  <=8'b0011_1111;	//0x3f    Turn on LCD
							end
			lcdon_b		:	begin
								mstate<=lcdon_c;
								lcd_rs<=0;
								lcd_e<=1;
							end
			lcdon_c		:	begin
								mstate<=clr_str_a;	//setrow_a;    
//								mstate<=delay;    
								lcd_rs<=0;
								lcd_e<=0;
								row_cnt <= 0;
								//cnt<=0;
							end
///////////////////////////clear lcd/////////////////////////////////////////////////////							
			clr_str_a	:	begin
								mstate<=clr_str_b;    //set x
								lcd_rs<=0;
								lcd_e <=0;
								data  <=8'hb8+row_cnt;	//0xc0
								{lcd_cs1,lcd_cs2} <= 2'b11;				//panel select
							end
			clr_str_b	:	begin
								mstate<=clr_str_c;
								lcd_rs<=0;
								lcd_e<=1;
							end
			clr_str_c	:	begin
								mstate<=clr_stc_a;    
								lcd_rs<=0;
								lcd_e<=0;
								row_cnt <= row_cnt + 1;
								column_cnt <= 0;
							end	
			clr_stc_a	:	begin
								mstate<=clr_stc_b;    //set y
								lcd_rs<=0;
								lcd_e <=0;
								data  <=8'h40 + column_cnt;	//0x40
							end
			clr_stc_b	:	begin
								mstate<=clr_stc_c;
								lcd_rs<=0;
								lcd_e<=1;
							end
			clr_stc_c	:	begin
								mstate<=clr_dat_a;    
								lcd_rs<=0;
								lcd_e<=0;
							end	
			clr_dat_a	:	begin
								mstate<=clr_dat_b;    //sent 00  clear lcd
								lcd_rs<=1;
								lcd_e <=0;
								data  <=8'h00;	
							end
			clr_dat_b	:	begin
								mstate<=clr_dat_c;
								lcd_rs<=1;
								lcd_e<=1;
								column_cnt <= column_cnt + 1;
							end
			clr_dat_c	:	begin
								if(column_cnt==64)
									if(row_cnt==0)
										mstate <= setrow_a;
									else
										mstate <= clr_str_a;
								else
									mstate <= clr_stc_a;///////////////
								lcd_rs<=1;
								lcd_e<=0;
								cnt<=8'hff;
							end	
////////////////////////////display char////////////////////////////////////////////		 				
							
			setrow_a	:	begin
								mstate<=setrow_b;    //set x
								lcd_rs<=0;
								lcd_e <=0;
								data  <=8'hb8+3;	//n row
								{lcd_cs1,lcd_cs2} <= 2'b11;			//panel select
							end
			setrow_b	:	begin
								mstate<=setrow_c;
								lcd_rs<=0;
								lcd_e<=1;
							end
			setrow_c	:	begin
								mstate<=setcol_a;    
								lcd_rs<=0;
								lcd_e<=0;
								column_cnt <= 0;
								col_cnt_buf <=0;
//								column_cnt <= 64;
							end	
			setcol_a	:	begin
								mstate<=setcol_b;    //set y
								lcd_rs<=0;
								lcd_e <=0;
//								data  <=8'h40 + column_cnt + x_offset;	//0x40
								if((column_cnt + x_offset)<64)					//panel select
									begin
										{lcd_cs1,lcd_cs2} <= 2'b10;
										data  <=8'h40 + column_cnt + x_offset;	//0x40
									end	
								else
									begin
										{lcd_cs1,lcd_cs2} <= 2'b01;
										data  <=8'h40 + column_cnt + x_offset-64;
									end	
							end
			setcol_b	:	begin
								mstate<=setcol_c;
								lcd_rs<=0;
								lcd_e<=1;
							end
			setcol_c	:	begin
								mstate<=dispchar_a;    
								lcd_rs<=0;
								lcd_e<=0;
							end	
			dispchar_a	:	begin
								mstate<=dispchar_b;    //display char
								lcd_rs<=1;
								lcd_e <=0;
								data  <=shuzi(dip_index*5+col_cnt_buf);
//								data  <=shuzi(column_cnt-64);
								if(col_cnt_buf==4)
									col_cnt_buf <= 0;
								else	
									col_cnt_buf <= col_cnt_buf + 1;
							end
			dispchar_b	:	begin
								mstate<=dispchar_c;
								lcd_rs<=1;
								lcd_e<=1;
								column_cnt <= column_cnt + 1;
							end
			dispchar_c	:	begin
								if(column_cnt==40) 	//50	
//									mstate <= delay;
									mstate <= setrow_a;
								else
									begin
										mstate <= setcol_a;
										//column_cnt <= column_cnt + 1;
									end	
								lcd_rs<=1;
								lcd_e<=0;
								cnt<=8'hff;
							end	
		 				
			delay		:	begin  
							mstate<=delay;//idle;
								if(!cnt)
									mstate<=delay;
								else
									begin
										cnt<=cnt-1;
										mstate<=delay;
									end
							end
			default        :  mstate<=idle;
           endcase

end
         
endmodule

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