frqtest.vhd

来自「用于视频运动图像编码的HUFFMAN编码」· VHDL 代码 · 共 37 行

---------      电子系                 学号：J02301                姓名：张宗旺----
library ieee;
use ieee.std_logic_1164.all;


entity FRQ_BENCH is
end FRQ_BENCH;


architecture BENCH of FRQ_BENCH is

	component FRQ_DIV
		port(	RST:		in std_logic;
			CLK: 		in std_logic;
			OUT_CLK: 	out std_logic	);
	end component;


	signal 	RST:std_logic:='0';
	signal	OUT_CLK:std_logic;
	signal 	CLK:std_logic:='1';
begin 
	--instantiat DUT component--
	
	DUT1: entity work.FRQ_DIV(ALG) port map(RST,CLK,OUT_CLK); 
	
	--signal generation--
	
	RST<='0' after 10 ns,'1' after 100 ns;	
	CLK<=not(CLK) after 5 ns;	

end BENCH;