📄 utils.s
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/* $Id: utils.S,v 1.2 2000/11/15 17:44:54 apc Exp $ *//* Copyright 2000 AG Electronics Ltd. *//* This code is distributed without warranty under the GPL v2 (see COPYING) */#include <ppc_asm.tmpl> .globl __pci_config_read_32__pci_config_read_32: lis r4, 0xfec0 stwbrx r3, r0, r4 sync lis r4, 0xfee0 lwbrx r3, 0, r4 blr .globl __pci_config_read_16__pci_config_read_16: lis r4, 0xfec0 andi. r5, r3, 2 stwbrx r3, r0, r4 sync oris r4, r5, 0xfee0 lhbrx r3, r0, r4 blr .globl __pci_config_read_8__pci_config_read_8: lis r4, 0xfec0 andi. r5, r3, 3 stwbrx r3, r0, r4 sync oris r4, r5, 0xfee0 lbz r3, 0(4) blr .globl __pci_config_write_32__pci_config_write_32: lis r5, 0xfec0 stwbrx r3, r0, r5 sync lis r5, 0xfee0 stwbrx r4, r0, r5 sync blr .globl __pci_config_write_16__pci_config_write_16: lis r5, 0xfec0 andi. r6, r3, 2 stwbrx r3, r0, 5 sync oris r5, r6, 0xfee0 sthbrx r4, r0, r5 sync blr .globl __pci_config_write_8__pci_config_write_8: lis r5, 0xfec0 andi. r6, r3, 3 stwbrx r3, r0, r5 sync oris r5, r6, 0xfee0 stb r4, 0(r5) sync blr .globl in_8in_8: oris r3, r3, 0xfe00 lbz r3,0(r3) blr .globl in_16in_16: oris r3, r3, 0xfe00 lhbrx r3, 0, r3 blr .globl in_32in_32: oris r3, r3, 0xfe00 lwbrx r3, 0, r3 blr .globl out_8out_8: oris r3, r3, 0xfe00 stb r4, 0(r3) eieio sync blr .globl out_16out_16: oris r3, r3, 0xfe00 sthbrx r4, 0, r3 eieio sync blr .globl out_32out_32: oris r3, r3, 0xfe00 stwbrx r4, 0, r3 eieio sync blr .globl read_8read_8: lbz r3,0(r3) blr .globl read_16read_16: lhbrx r3, 0, r3 blr .globl read_32read_32: lwbrx r3, 0, r3 blr .globl write_8write_8: stb r4, 0(r3) eieio blr .globl write_16write_16: sthbrx r4, 0, r3 eieio blr .globl write_32write_32: stwbrx r4, 0, r3 eieio blr ⌨️ 快捷键说明
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