sandpoint.c

一个开放源码

/* $Id: sandpoint.c,v 1.7 2000/11/15 17:44:54 apc Exp $ */
/* Copyright 2000  AG Electronics Ltd. */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */

#include <bsp.h>
#include <malloc.h>
#include <ppc.h>
#include <stdio.h>
#include <console.h>
#include <flash.h>
#include <pci.h>
#include <net.h>

unsigned long memory_base;
unsigned long bios_base;
unsigned long bios_top;
unsigned long memory_top;
unsigned long physical_memory_size;

static void pci_configure (void)
{
    /* On bus 0, we don't configure device 0. Because it is us. */
    int dev;

    pci_root.have_io_space = 1;
    pci_root.have_prefetch_space = 0;
    pci_root.fast_back_to_back = 1;
    
    for (dev = 1; dev < 32; dev++)
	if (dev != 12)		/* On Sandpoint, dev 12 is also the PMC */
	{
	    u32 data;
	    int result = pci_config_read_32 (0, dev, 0, 0, &data);

	    if (result == 0 && data != 0xffffffff)
		pci_configure_device (&pci_root, dev, 0);
	}
    pci_assign_space (&pci_root, PCI_REGION_IO, 0x10000, 0x1000);
    pci_assign_space (&pci_root, PCI_REGION_MMIO, 0xfc000000, 0x80000000);
    pci_set_command(&pci_root);
}



volatile char *IOIndex = (volatile char *)0xFE00015C;
volatile char *IO_Data = (volatile char *)0xFE00015D;

void io_output(char address, char data)
{
    *IOIndex = address;
    *IO_Data = data;  
}

int memory_has_failed;

void bsp_init_pre_reloc(unsigned offset)
{
    extern char __start[];
    extern char __start_data[];
    extern char __stack_end[];
    extern char __heap_end[];
    unsigned rom_image = (unsigned) __start & 0xfff00000;
    if (__heap_end > __stack_end)
    {
        malloc_add_pool(__stack_end, __heap_end - __stack_end);
        bios_top = (unsigned long) __heap_end;
    }
    else
    {
        malloc_add_pool(__heap_end, 256 * 1024);
        bios_top = 256*1024 + (unsigned long) __heap_end;
    }
    TftpLoadAddress = (unsigned char *)(__heap_end + 1024*1024);
    
    ppc_setup_cpu(1); /* icache enable = 1 */
    ppc_set_ibats_reloc(rom_image,
                        rom_image + offset, 0x00100000);
    if ((rom_image & 0xf0000000) != 0xf0000000)
        ppc_set_io_dbat_reloc(2, rom_image,
                      rom_image + offset, 0x00100000);
    ppc_enable_mmu();
    
    /* Enable Super IO Chip */
    io_output(7, 6); /* LDN */
    io_output(0x30, 0); /* Activate */
    io_output(0x60, 3); /* IO Base */
    io_output(0x61, 0xf8); /* IO Base */
    io_output(0x30, 1); /* Activate */
    
    init_console_16550(0xfe0003f8, 1846154, 1); 
    printf("Hello world\n");
#if 0
    printf("Testing memory...\n");
    banktest(0);
    banktest(1);
    banktest(2);
    banktest(3);
    if (memory_has_failed)
    {
        printf(" ****************************************************\n");
        printf(" *** WARNING - A memory failure has been detected ***\n");
        printf(" ****************************************************\n");
    }
#endif
    memory_base = 0;
    memory_top = 32*1024 * 1024;
    physical_memory_size = memory_top;
    bios_base = (unsigned long) __start_data;
    
    /* If we have some working RAM, we copy the code and rodata into it.
       This allows us to reprogram the flash later. */
    if (!memory_has_failed)
        {
            ppc_set_mem_dbat_reloc(2, rom_image,
                      memory_top - 0x00100000, 0x00100000);
            ppc_set_mem_dbat_reloc(1, rom_image + offset,
                      rom_image + offset, 0x00100000);
            memcpy(rom_image, rom_image + offset, 0x00100000);
            ppc_set_ibats_reloc2(rom_image, rom_image + offset,
                        memory_top - 0x00100000, 0x00100000);
            make_coherent(rom_image, 0x00100000);
            memory_top -= 0x00100000;
        }
    
    ppc_set_memory_dbat(physical_memory_size);
    ppc_set_io_dbat(3, 0xf0000000, 0x10000000);
    ppc_set_io_dbat(1, 0xe0000000, 0x10000000);
    ppc_enable_dcache();
}

void bsp_init_post_reloc(void)
{
}

void bsp_init_post_hello(void)
{
    extern char __stack_end[];
    extern char __heap_end[];
    
    init_flash_amd800("BOOT", 0xff000000, 1);
    pci_configure();
    if (__heap_end > __stack_end && ! memory_has_failed)
    {
        malloc_add_pool(__heap_end, 256*1024);
        bios_top = 256*1024 + (unsigned long) __heap_end;
    }
    printf("Memory from 0x%08lx to 0x%08lx, BIOS uses 0x%08lx to 0x%08lx\n",
            memory_base, memory_top, bios_base, bios_top);
}

void bsp_indicate_dead(void)
{    
    for(;;)
    {
    }       
}

void bsp_identify(void)
{
    /* unsigned i; */
    struct pci_device *net_device;
    
    printf("Sandpoint BSP\n");

    pci_scan(0, NULL, NULL);
    ppc_identify();
}

int NetInit(void)
{
    extern NetCard_t NetNE2100;
	NetCard_t *	nc = &NetNE2100;


	if (NetCard != nc)
	{
		if (NetCard)
			(*NetCard->halt)();
		if (!(*nc->init)())
			return 0;
		NetCard = nc;
	}

	return 1;
}

unsigned bsp_clock_speed(void)
{
    return 100000000 / 4;
}

void bsp_mailbox_check(void)
{
}
void bsp_run_executable(unsigned entry, char *cmd_line,
         unsigned initrd_start, unsigned initrd_length)
{
    unsigned bootblock[5];
    printf("Bsp_run\n");
    bootblock[0] = physical_memory_size;
    bootblock[1] = (unsigned) cmd_line;
    if (cmd_line)
        bootblock[2] = (unsigned) (cmd_line + strlen(cmd_line));
    else
        bootblock[2] = 0;
    bootblock[3] = initrd_start;
    bootblock[4] = initrd_start + initrd_length;
    make_coherent(bootblock, 128);
    printf("Bootblock at 0x%p\n", bootblock);
    ppc_run_executable(entry, 0x54504534, bootblock);  /* TPE4 */
}