vhdl2.map.summary

来自「程序提供了一种高效简单的38译码器的算法」· SUMMARY 代码 · 共 13 行

Analysis & Synthesis Status : Successful - Thu Jan 03 00:04:46 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : Vhdl2
Top-level Entity Name : Vhdl2
Family : Stratix
Total logic elements : 9
Total pins : 14
Total virtual pins : 0
Total memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0