rcvr.map.eqn

基于MAX2运用Quartus实现串口通信

C1L2 = C1_counter2[7] $ (C1L2_carry_eqn);

--C1L3 is txt:inst1|add~289
--operation mode is arithmetic

C1L3 = CARRY(!C1L7 # !C1_counter2[7]);


--C1L4 is txt:inst1|add~292
--operation mode is arithmetic

C1L4_carry_eqn = C1L11;
C1L4 = C1_counter2[5] $ (C1L4_carry_eqn);

--C1L5 is txt:inst1|add~294
--operation mode is arithmetic

C1L5 = CARRY(!C1L11 # !C1_counter2[5]);


--C1L6 is txt:inst1|add~297
--operation mode is arithmetic

C1L6_carry_eqn = C1L5;
C1L6 = C1_counter2[6] $ (!C1L6_carry_eqn);

--C1L7 is txt:inst1|add~299
--operation mode is arithmetic

C1L7 = CARRY(C1_counter2[6] & (!C1L5));


--C1L8 is txt:inst1|add~302
--operation mode is arithmetic

C1L8 = !C1_counter2[0];

--C1L9 is txt:inst1|add~304
--operation mode is arithmetic

C1L9 = CARRY(C1_counter2[0]);


--C1L10 is txt:inst1|add~307
--operation mode is arithmetic

C1L10_carry_eqn = C1L13;
C1L10 = C1_counter2[4] $ (!C1L10_carry_eqn);

--C1L11 is txt:inst1|add~309
--operation mode is arithmetic

C1L11 = CARRY(C1_counter2[4] & (!C1L13));


--C1L12 is txt:inst1|add~312
--operation mode is arithmetic

C1L12_carry_eqn = C1L15;
C1L12 = C1_counter2[3] $ (C1L12_carry_eqn);

--C1L13 is txt:inst1|add~314
--operation mode is arithmetic

C1L13 = CARRY(!C1L15 # !C1_counter2[3]);


--C1L14 is txt:inst1|add~317
--operation mode is arithmetic

C1L14_carry_eqn = C1L17;
C1L14 = C1_counter2[2] $ (!C1L14_carry_eqn);

--C1L15 is txt:inst1|add~319
--operation mode is arithmetic

C1L15 = CARRY(C1_counter2[2] & (!C1L17));


--C1L16 is txt:inst1|add~322
--operation mode is arithmetic

C1L16_carry_eqn = C1L9;
C1L16 = C1_counter2[1] $ (C1L16_carry_eqn);

--C1L17 is txt:inst1|add~324
--operation mode is arithmetic

C1L17 = CARRY(!C1L9 # !C1_counter2[1]);


--B1_rxd1 is rcvr:inst|rxd1
--operation mode is normal

B1_rxd1_lut_out = rxd;
B1_rxd1 = DFFEAS(B1_rxd1_lut_out, B1_clk16x, VCC, , , , , , );


--A1L28 is rtl~215
--operation mode is normal

A1L28 = B1_no_bits_rcvd[3] & B1_no_bits_rcvd[2] & !B1_no_bits_rcvd[1] & !B1_no_bits_rcvd[0];


--B1L1 is rcvr:inst|add~214
--operation mode is normal

B1L1_carry_eqn = B1L3;
B1L1 = B1_counter2[8] $ (!B1L1_carry_eqn);


--B1L2 is rcvr:inst|add~219
--operation mode is arithmetic

B1L2_carry_eqn = B1L7;
B1L2 = B1_counter2[7] $ (B1L2_carry_eqn);

--B1L3 is rcvr:inst|add~221
--operation mode is arithmetic

B1L3 = CARRY(!B1L7 # !B1_counter2[7]);


--B1L4 is rcvr:inst|add~224
--operation mode is arithmetic

B1L4_carry_eqn = B1L11;
B1L4 = B1_counter2[5] $ (B1L4_carry_eqn);

--B1L5 is rcvr:inst|add~226
--operation mode is arithmetic

B1L5 = CARRY(!B1L11 # !B1_counter2[5]);


--B1L6 is rcvr:inst|add~229
--operation mode is arithmetic

B1L6_carry_eqn = B1L5;
B1L6 = B1_counter2[6] $ (!B1L6_carry_eqn);

--B1L7 is rcvr:inst|add~231
--operation mode is arithmetic

B1L7 = CARRY(B1_counter2[6] & (!B1L5));


--B1L8 is rcvr:inst|add~234
--operation mode is arithmetic

B1L8 = !B1_counter2[0];

--B1L9 is rcvr:inst|add~236
--operation mode is arithmetic

B1L9 = CARRY(B1_counter2[0]);


--B1L10 is rcvr:inst|add~239
--operation mode is arithmetic

B1L10_carry_eqn = B1L13;
B1L10 = B1_counter2[4] $ (!B1L10_carry_eqn);

--B1L11 is rcvr:inst|add~241
--operation mode is arithmetic

B1L11 = CARRY(B1_counter2[4] & (!B1L13));


--B1L12 is rcvr:inst|add~244
--operation mode is arithmetic

B1L12_carry_eqn = B1L15;
B1L12 = B1_counter2[3] $ (B1L12_carry_eqn);

--B1L13 is rcvr:inst|add~246
--operation mode is arithmetic

B1L13 = CARRY(!B1L15 # !B1_counter2[3]);


--B1L14 is rcvr:inst|add~249
--operation mode is arithmetic

B1L14_carry_eqn = B1L17;
B1L14 = B1_counter2[2] $ (!B1L14_carry_eqn);

--B1L15 is rcvr:inst|add~251
--operation mode is arithmetic

B1L15 = CARRY(B1_counter2[2] & (!B1L17));


--B1L16 is rcvr:inst|add~254
--operation mode is arithmetic

B1L16_carry_eqn = B1L9;
B1L16 = B1_counter2[1] $ (B1L16_carry_eqn);

--B1L17 is rcvr:inst|add~256
--operation mode is arithmetic

B1L17 = CARRY(!B1L9 # !B1_counter2[1]);


--C1_counter1[0] is txt:inst1|counter1[0]
--operation mode is normal

C1_counter1[0]_lut_out = C1L18 & (C1_counter1[0] # !A1L29);
C1_counter1[0] = DFFEAS(C1_counter1[0]_lut_out, clk, VCC, , , , , , );


--C1_counter1[4] is txt:inst1|counter1[4]
--operation mode is normal

C1_counter1[4]_lut_out = C1L20 & (C1_counter1[0] # !A1L29);
C1_counter1[4] = DFFEAS(C1_counter1[4]_lut_out, clk, VCC, , , , , , );


--C1_counter1[3] is txt:inst1|counter1[3]
--operation mode is normal

C1_counter1[3]_lut_out = C1L21 & (C1_counter1[0] # !A1L29);
C1_counter1[3] = DFFEAS(C1_counter1[3]_lut_out, clk, VCC, , , , , , );


--C1_counter1[1] is txt:inst1|counter1[1]
--operation mode is normal

C1_counter1[1]_lut_out = C1L23 & (C1_counter1[0] # !A1L29);
C1_counter1[1] = DFFEAS(C1_counter1[1]_lut_out, clk, VCC, , , , , , );


--C1_counter1[2] is txt:inst1|counter1[2]
--operation mode is normal

C1_counter1[2]_lut_out = C1L25;
C1_counter1[2] = DFFEAS(C1_counter1[2]_lut_out, clk, VCC, , , , , , );


--A1L29 is rtl~216
--operation mode is normal

A1L29 = C1_counter1[4] & C1_counter1[3] & C1_counter1[1] & !C1_counter1[2];


--C1_tbr[2] is txt:inst1|tbr[2]
--operation mode is normal

C1_tbr[2]_lut_out = din[2];
C1_tbr[2] = DFFEAS(C1_tbr[2]_lut_out, !wrn, VCC, , , , , , );


--C1_tsr[3] is txt:inst1|tsr[3]
--operation mode is normal

C1_tsr[3]_lut_out = A1L20 & C1_tbr[3] # !A1L20 & (C1_tsr[4]);
C1_tsr[3] = DFFEAS(C1_tsr[3]_lut_out, C1_clk1x, VCC, , C1L67, , , , );


--C1L18 is txt:inst1|add~327
--operation mode is arithmetic

C1L18 = !C1_counter1[0];

--C1L19 is txt:inst1|add~329
--operation mode is arithmetic

C1L19 = CARRY(C1_counter1[0]);


--C1L20 is txt:inst1|add~332
--operation mode is normal

C1L20_carry_eqn = C1L22;
C1L20 = C1_counter1[4] $ (!C1L20_carry_eqn);


--C1L21 is txt:inst1|add~337
--operation mode is arithmetic

C1L21_carry_eqn = C1L26;
C1L21 = C1_counter1[3] $ (C1L21_carry_eqn);

--C1L22 is txt:inst1|add~339
--operation mode is arithmetic

C1L22 = CARRY(!C1L26 # !C1_counter1[3]);


--C1L23 is txt:inst1|add~342
--operation mode is arithmetic

C1L23_carry_eqn = C1L19;
C1L23 = C1_counter1[1] $ (C1L23_carry_eqn);

--C1L24 is txt:inst1|add~344
--operation mode is arithmetic

C1L24 = CARRY(!C1L19 # !C1_counter1[1]);


--C1L25 is txt:inst1|add~347
--operation mode is arithmetic

C1L25_carry_eqn = C1L24;
C1L25 = C1_counter1[2] $ (!C1L25_carry_eqn);

--C1L26 is txt:inst1|add~349
--operation mode is arithmetic

C1L26 = CARRY(C1_counter1[2] & (!C1L24));


--C1_tbr[3] is txt:inst1|tbr[3]
--operation mode is normal

C1_tbr[3]_lut_out = din[3];
C1_tbr[3] = DFFEAS(C1_tbr[3]_lut_out, !wrn, VCC, , , , , , );


--C1_tsr[4] is txt:inst1|tsr[4]
--operation mode is normal

C1_tsr[4]_lut_out = A1L20 & C1_tbr[4] # !A1L20 & (C1_tsr[5]);
C1_tsr[4] = DFFEAS(C1_tsr[4]_lut_out, C1_clk1x, VCC, , C1L67, , , , );


--C1_tbr[4] is txt:inst1|tbr[4]
--operation mode is normal

C1_tbr[4]_lut_out = din[4];
C1_tbr[4] = DFFEAS(C1_tbr[4]_lut_out, !wrn, VCC, , , , , , );


--C1_tsr[5] is txt:inst1|tsr[5]
--operation mode is normal

C1_tsr[5]_lut_out = A1L20 & C1_tbr[5] # !A1L20 & (C1_tsr[6]);
C1_tsr[5] = DFFEAS(C1_tsr[5]_lut_out, C1_clk1x, VCC, , C1L67, , , , );


--C1_tbr[5] is txt:inst1|tbr[5]
--operation mode is normal

C1_tbr[5]_lut_out = din[5];
C1_tbr[5] = DFFEAS(C1_tbr[5]_lut_out, !wrn, VCC, , , , , , );


--C1_tsr[6] is txt:inst1|tsr[6]
--operation mode is normal

C1_tsr[6]_lut_out = A1L20 & C1_tbr[6] # !A1L20 & (C1_tsr[7]);
C1_tsr[6] = DFFEAS(C1_tsr[6]_lut_out, C1_clk1x, VCC, , C1L67, , , , );


--C1_tbr[6] is txt:inst1|tbr[6]
--operation mode is normal

C1_tbr[6]_lut_out = din[6];
C1_tbr[6] = DFFEAS(C1_tbr[6]_lut_out, !wrn, VCC, , , , , , );


--C1_tsr[7] is txt:inst1|tsr[7]
--operation mode is normal

C1_tsr[7]_lut_out = C1L75 # C1_tsr[7] & C1L76 & !A1L20;
C1_tsr[7] = DFFEAS(C1_tsr[7]_lut_out, C1_clk1x, VCC, , , , , , );


--C1_tbr[7] is txt:inst1|tbr[7]
--operation mode is normal

C1_tbr[7]_lut_out = din[7];
C1_tbr[7] = DFFEAS(C1_tbr[7]_lut_out, !wrn, VCC, , , , , , );


--C1L75 is txt:inst1|tsr[7]~668
--operation mode is normal

C1L75 = A1L21 & (C1_no_bits_sent[0] & C1_tbr[7] # !C1_no_bits_sent[0] & (C1_tsr[7]));


--C1L76 is txt:inst1|tsr[7]~669
--operation mode is normal

C1L76 = C1_no_bits_sent[3] $ (!C1_no_bits_sent[2] & (!C1_no_bits_sent[0] # !C1_no_bits_sent[1]));


--clk is clk
--operation mode is input

clk = INPUT();


--din[0] is din[0]
--operation mode is input

din[0] = INPUT();


--wrn is wrn
--operation mode is input

wrn = INPUT();


--din[1] is din[1]
--operation mode is input

din[1] = INPUT();


--rxd is rxd
--operation mode is input

rxd = INPUT();


--din[2] is din[2]
--operation mode is input

din[2] = INPUT();


--din[3] is din[3]
--operation mode is input

din[3] = INPUT();


--din[4] is din[4]
--operation mode is input

din[4] = INPUT();


--din[5] is din[5]
--operation mode is input

din[5] = INPUT();


--din[6] is din[6]
--operation mode is input

din[6] = INPUT();


--din[7] is din[7]
--operation mode is input

din[7] = INPUT();


--sdo is sdo
--operation mode is output

sdo = OUTPUT(C1_sdo);


--dout[7] is dout[7]
--operation mode is output

dout[7] = OUTPUT(B1_rbr[7]);


--dout[6] is dout[6]
--operation mode is output

dout[6] = OUTPUT(B1_rbr[6]);


--dout[5] is dout[5]
--operation mode is output

dout[5] = OUTPUT(B1_rbr[5]);


--dout[4] is dout[4]
--operation mode is output

dout[4] = OUTPUT(B1_rbr[4]);


--dout[3] is dout[3]
--operation mode is output

dout[3] = OUTPUT(B1_rbr[3]);


--dout[2] is dout[2]
--operation mode is output

dout[2] = OUTPUT(B1_rbr[2]);


--dout[1] is dout[1]
--operation mode is output

dout[1] = OUTPUT(B1_rbr[1]);


--dout[0] is dout[0]
--operation mode is output

dout[0] = OUTPUT(B1_rbr[0]);