prev_cmp_lcdcont.map.qmsg

运用Quartus在LCM中显示静态宫殿图形

{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd0:mylcd\|rw_int data_in GND " "Warning (14130): Reduced register \"lcd0:mylcd\|rw_int\" with stuck data_in port to stuck value GND" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 49 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|lcdcont\|lcd0:mylcd\|state 14 " "Info: State machine \"\|lcdcont\|lcd0:mylcd\|state\" contains 14 states" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|lcdcont\|lcd0:mylcd\|state " "Info: Selected Auto state machine encoding method for state machine \"\|lcdcont\|lcd0:mylcd\|state\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0 "" 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|lcdcont\|lcd0:mylcd\|state " "Info: Encoding result for state machine \"\|lcdcont\|lcd0:mylcd\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "14 " "Info: Completed encoding using 14 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.setadd " "Info: Encoded state bit \"lcd0:mylcd\|state.setadd\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.write3 " "Info: Encoded state bit \"lcd0:mylcd\|state.write3\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.write2 " "Info: Encoded state bit \"lcd0:mylcd\|state.write2\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.write1 " "Info: Encoded state bit \"lcd0:mylcd\|state.write1\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.idle " "Info: Encoded state bit \"lcd0:mylcd\|state.idle\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.home " "Info: Encoded state bit \"lcd0:mylcd\|state.home\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.setmode " "Info: Encoded state bit \"lcd0:mylcd\|state.setmode\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.clear1 " "Info: Encoded state bit \"lcd0:mylcd\|state.clear1\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.clear " "Info: Encoded state bit \"lcd0:mylcd\|state.clear\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.dispoff " "Info: Encoded state bit \"lcd0:mylcd\|state.dispoff\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.add2 " "Info: Encoded state bit \"lcd0:mylcd\|state.add2\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.add " "Info: Encoded state bit \"lcd0:mylcd\|state.add\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.setfunc " "Info: Encoded state bit \"lcd0:mylcd\|state.setfunc\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd0:mylcd\|state.warmup " "Info: Encoded state bit \"lcd0:mylcd\|state.warmup\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.warmup 00000000000000 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.warmup\" uses code string \"00000000000000\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.setfunc 00000000000011 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.setfunc\" uses code string \"00000000000011\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.add 00000000000101 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.add\" uses code string \"00000000000101\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.add2 00000000001001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.add2\" uses code string \"00000000001001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.dispoff 00000000010001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.dispoff\" uses code string \"00000000010001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.clear 00000000100001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.clear\" uses code string \"00000000100001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.clear1 00000001000001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.clear1\" uses code string \"00000001000001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.setmode 00000010000001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.setmode\" uses code string \"00000010000001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.home 00000100000001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.home\" uses code string \"00000100000001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.idle 00001000000001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.idle\" uses code string \"00001000000001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.write1 00010000000001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.write1\" uses code string \"00010000000001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.write2 00100000000001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.write2\" uses code string \"00100000000001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.write3 01000000000001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.write3\" uses code string \"01000000000001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdcont\|lcd0:mylcd\|state.setadd 10000000000001 " "Info: State \"\|lcdcont\|lcd0:mylcd\|state.setadd\" uses code string \"10000000000001\"" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0}  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd0:mylcd\|state.idle data_in GND " "Warning (14130): Reduced register \"lcd0:mylcd\|state.idle\" with stuck data_in port to stuck value GND" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 32 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_NO_CLOCK_TRANSITION" "lcd0:mylcd\|last_data_valid " "Warning (14110): No clock transition on \"lcd0:mylcd\|last_data_valid\" register due to stuck clock or clock enable" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 37 -1 0 } }  } 0 14110 "No clock transition on \"%1!s!\" register due to stuck clock or clock enable" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd0:mylcd\|last_data_valid clock_enable GND " "Warning (14130): Reduced register \"lcd0:mylcd\|last_data_valid\" with stuck clock_enable port to stuck value GND" {  } { { "lcd0.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcd0.vhd" 37 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "rw_out GND " "Warning (13410): Pin \"rw_out\" stuck at GND" {  } { { "lcdcont.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcdcont.vhd" 10 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0} { "Warning" "WOPT_MLS_STUCK_PIN" "cont GND " "Warning (13410): Pin \"cont\" stuck at GND" {  } { { "lcdcont.vhd" "" { Text "E:/old project/CPLD2.3/EPM Debug OK edition/lcd_palace/lcdcont.vhd" 10 -1 0 } }  } 0 13410 "Pin \"%1!s!\" stuck at %2!s!" 0 0 "" 0}  } {  } 0 0 "Output pins are stuck at VCC or GND" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "160 " "Info: Implemented 160 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "12 " "Info: Implemented 12 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "146 " "Info: Implemented 146 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 9 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 9 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "159 " "Info: Allocated 159 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Jun 17 10:22:34 2008 " "Info: Processing ended: Tue Jun 17 10:22:34 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}