coswave.map.qmsg

主要是通过Altera公司的Cuclone系列的FPGA-EP1C3T144C8产生余弦波的源代码 基于LPM-ROM余弦波一周期含有256个10位数据；

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Web Edition " "Info: Version 5.1 Build 176 10/26/2005 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Jan 01 00:59:03 2003 " "Info: Processing started: Wed Jan 01 00:59:03 2003" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off coswave -c coswave " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off coswave -c coswave" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "coswave.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file coswave.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 coswave " "Info: Found entity 1: coswave" {  } { { "coswave.bdf" "" { Schematic "D:/coswave/coswave.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "coswave " "Info: Elaborating entity \"coswave\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "data_rom.vhd 2 1 " "Warning: Using design file data_rom.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 data_rom-SYN " "Info: Found design unit 1: data_rom-SYN" {  } { { "data_rom.vhd" "" { Text "D:/coswave/data_rom.vhd" 49 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 data_rom " "Info: Found entity 1: data_rom" {  } { { "data_rom.vhd" "" { Text "D:/coswave/data_rom.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "data_rom data_rom:inst " "Info: Elaborating entity \"data_rom\" for hierarchy \"data_rom:inst\"" {  } { { "coswave.bdf" "inst" { Schematic "D:/coswave/coswave.bdf" { { 120 376 536 200 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus51/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 425 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram data_rom:inst\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"data_rom:inst\|altsyncram:altsyncram_component\"" {  } { { "data_rom.vhd" "altsyncram_component" { Text "D:/coswave/data_rom.vhd" 81 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_6bu.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_6bu.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_6bu " "Info: Found entity 1: altsyncram_6bu" {  } { { "db/altsyncram_6bu.tdf" "" { Text "D:/coswave/db/altsyncram_6bu.tdf" 36 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_6bu data_rom:inst\|altsyncram:altsyncram_component\|altsyncram_6bu:auto_generated " "Info: Elaborating entity \"altsyncram_6bu\" for hierarchy \"data_rom:inst\|altsyncram:altsyncram_component\|altsyncram_6bu:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/quartus51/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "lpm_conter8.vhd 2 1 " "Warning: Using design file lpm_conter8.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 lpm_conter8-SYN " "Info: Found design unit 1: lpm_conter8-SYN" {  } { { "lpm_conter8.vhd" "" { Text "D:/coswave/lpm_conter8.vhd" 50 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 lpm_conter8 " "Info: Found entity 1: lpm_conter8" {  } { { "lpm_conter8.vhd" "" { Text "D:/coswave/lpm_conter8.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_conter8 lpm_conter8:inst1 " "Info: Elaborating entity \"lpm_conter8\" for hierarchy \"lpm_conter8:inst1\"" {  } { { "coswave.bdf" "inst1" { Schematic "D:/coswave/coswave.bdf" { { 112 184 328 208 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus51/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus51/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/lpm_counter.tdf" 233 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_counter lpm_conter8:inst1\|lpm_counter:lpm_counter_component " "Info: Elaborating entity \"lpm_counter\" for hierarchy \"lpm_conter8:inst1\|lpm_counter:lpm_counter_component\"" {  } { { "lpm_conter8.vhd" "lpm_counter_component" { Text "D:/coswave/lpm_conter8.vhd" 74 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_9he.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_9he.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_9he " "Info: Found entity 1: cntr_9he" {  } { { "db/cntr_9he.tdf" "" { Text "D:/coswave/db/cntr_9he.tdf" 25 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cntr_9he lpm_conter8:inst1\|lpm_counter:lpm_counter_component\|cntr_9he:auto_generated " "Info: Elaborating entity \"cntr_9he\" for hierarchy \"lpm_conter8:inst1\|lpm_counter:lpm_counter_component\|cntr_9he:auto_generated\"" {  } { { "lpm_counter.tdf" "auto_generated" { Text "c:/altera/quartus51/libraries/megafunctions/lpm_counter.tdf" 257 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "31 " "Info: Implemented 31 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "3 " "Info: Implemented 3 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "10 " "Info: Implemented 10 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "8 " "Info: Implemented 8 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0} { "Info" "ISCL_SCL_TM_RAMS" "10 " "Info: Implemented 10 RAM segments" {  } {  } 0 0 "Implemented %1!d! RAM segments" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Jan 01 00:59:07 2003 " "Info: Processing ended: Wed Jan 01 00:59:07 2003" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}