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📄 coswave.map.rpt

📁 主要是通过Altera公司的Cuclone系列的FPGA-EP1C3T144C8产生余弦波的源代码 基于LPM-ROM余弦波一周期含有256个10位数据;
💻 RPT
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; BYTE_SIZE_BLOCK                    ; 8              ; Untyped                              ;
; AUTO_CARRY_CHAINS                  ; ON             ; AUTO_CARRY                           ;
; IGNORE_CARRY_BUFFERS               ; OFF            ; IGNORE_CARRY                         ;
; AUTO_CASCADE_CHAINS                ; ON             ; AUTO_CASCADE                         ;
; IGNORE_CASCADE_BUFFERS             ; OFF            ; IGNORE_CASCADE                       ;
; OPERATION_MODE                     ; ROM            ; Untyped                              ;
; WIDTH_A                            ; 10             ; Integer                              ;
; WIDTHAD_A                          ; 8              ; Integer                              ;
; NUMWORDS_A                         ; 256            ; Integer                              ;
; OUTDATA_REG_A                      ; UNREGISTERED   ; Untyped                              ;
; ADDRESS_ACLR_A                     ; NONE           ; Untyped                              ;
; OUTDATA_ACLR_A                     ; NONE           ; Untyped                              ;
; WRCONTROL_ACLR_A                   ; NONE           ; Untyped                              ;
; INDATA_ACLR_A                      ; NONE           ; Untyped                              ;
; BYTEENA_ACLR_A                     ; NONE           ; Untyped                              ;
; WIDTH_B                            ; 1              ; Untyped                              ;
; WIDTHAD_B                          ; 1              ; Untyped                              ;
; NUMWORDS_B                         ; 1              ; Untyped                              ;
; INDATA_REG_B                       ; CLOCK1         ; Untyped                              ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1         ; Untyped                              ;
; RDCONTROL_REG_B                    ; CLOCK1         ; Untyped                              ;
; ADDRESS_REG_B                      ; CLOCK1         ; Untyped                              ;
; OUTDATA_REG_B                      ; UNREGISTERED   ; Untyped                              ;
; BYTEENA_REG_B                      ; CLOCK1         ; Untyped                              ;
; INDATA_ACLR_B                      ; NONE           ; Untyped                              ;
; WRCONTROL_ACLR_B                   ; NONE           ; Untyped                              ;
; ADDRESS_ACLR_B                     ; NONE           ; Untyped                              ;
; OUTDATA_ACLR_B                     ; NONE           ; Untyped                              ;
; RDCONTROL_ACLR_B                   ; NONE           ; Untyped                              ;
; BYTEENA_ACLR_B                     ; NONE           ; Untyped                              ;
; WIDTH_BYTEENA_A                    ; 1              ; Integer                              ;
; WIDTH_BYTEENA_B                    ; 1              ; Untyped                              ;
; RAM_BLOCK_TYPE                     ; M4K            ; Untyped                              ;
; BYTE_SIZE                          ; 8              ; Untyped                              ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE      ; Untyped                              ;
; INIT_FILE                          ; Mif1.mif       ; Untyped                              ;
; INIT_FILE_LAYOUT                   ; PORT_A         ; Untyped                              ;
; MAXIMUM_DEPTH                      ; 0              ; Untyped                              ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL         ; Untyped                              ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL         ; Untyped                              ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL         ; Untyped                              ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL         ; Untyped                              ;
; DEVICE_FAMILY                      ; Cyclone        ; Untyped                              ;
; CBXI_PARAMETER                     ; altsyncram_6bu ; Untyped                              ;
+------------------------------------+----------------+--------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: lpm_conter8:inst1|lpm_counter:lpm_counter_component ;
+------------------------+-------------+-----------------------------------------------------------+
; Parameter Name         ; Value       ; Type                                                      ;
+------------------------+-------------+-----------------------------------------------------------+
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                                                ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                                              ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                                              ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                                            ;
; LPM_WIDTH              ; 8           ; Integer                                                   ;
; LPM_DIRECTION          ; UP          ; Untyped                                                   ;
; LPM_MODULUS            ; 0           ; Untyped                                                   ;
; LPM_AVALUE             ; UNUSED      ; Untyped                                                   ;
; LPM_SVALUE             ; UNUSED      ; Untyped                                                   ;
; LPM_PORT_UPDOWN        ; PORT_UNUSED ; Untyped                                                   ;
; DEVICE_FAMILY          ; Cyclone     ; Untyped                                                   ;
; CARRY_CHAIN            ; MANUAL      ; Untyped                                                   ;
; CARRY_CHAIN_LENGTH     ; 48          ; CARRY_CHAIN_LENGTH                                        ;
; NOT_GATE_PUSH_BACK     ; ON          ; NOT_GATE_PUSH_BACK                                        ;
; CARRY_CNT_EN           ; SMART       ; Untyped                                                   ;
; LABWIDE_SCLR           ; ON          ; Untyped                                                   ;
; USE_NEW_VERSION        ; TRUE        ; Untyped                                                   ;
; CBXI_PARAMETER         ; cntr_9he    ; Untyped                                                   ;
+------------------------+-------------+-----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in D:/coswave/coswave.map.eqn.


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 5.1 Build 176 10/26/2005 SJ Web Edition
    Info: Processing started: Wed Jan 01 00:59:03 2003
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off coswave -c coswave
Info: Found 1 design units, including 1 entities, in source file coswave.bdf
    Info: Found entity 1: coswave
Info: Elaborating entity "coswave" for the top level hierarchy
Warning: Using design file data_rom.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: data_rom-SYN
    Info: Found entity 1: data_rom
Info: Elaborating entity "data_rom" for hierarchy "data_rom:inst"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus51/libraries/megafunctions/altsyncram.tdf
    Info: Found entity 1: altsyncram
Info: Elaborating entity "altsyncram" for hierarchy "data_rom:inst|altsyncram:altsyncram_component"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_6bu.tdf
    Info: Found entity 1: altsyncram_6bu
Info: Elaborating entity "altsyncram_6bu" for hierarchy "data_rom:inst|altsyncram:altsyncram_component|altsyncram_6bu:auto_generated"
Warning: Using design file lpm_conter8.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: lpm_conter8-SYN
    Info: Found entity 1: lpm_conter8
Info: Elaborating entity "lpm_conter8" for hierarchy "lpm_conter8:inst1"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus51/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Elaborating entity "lpm_counter" for hierarchy "lpm_conter8:inst1|lpm_counter:lpm_counter_component"
Info: Found 1 design units, including 1 entities, in source file db/cntr_9he.tdf
    Info: Found entity 1: cntr_9he
Info: Elaborating entity "cntr_9he" for hierarchy "lpm_conter8:inst1|lpm_counter:lpm_counter_component|cntr_9he:auto_generated"
Info: Implemented 31 device resources after synthesis - the final resource count might be different
    Info: Implemented 3 input pins
    Info: Implemented 10 output pins
    Info: Implemented 8 logic cells
    Info: Implemented 10 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 2 warnings
    Info: Processing ended: Wed Jan 01 00:59:07 2003
    Info: Elapsed time: 00:00:04


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