speaker.tan.qmsg

用VHDL语言仿真音乐设计 用VHDL语言仿真音乐设计

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk8HZ memory notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|ram_block1a1~porta_address_reg0 memory notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|q_a\[3\] 256.02 MHz 3.906 ns Internal " "Info: Clock \"clk8HZ\" has Internal fmax of 256.02 MHz between source memory \"notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|ram_block1a1~porta_address_reg0\" and destination memory \"notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|q_a\[3\]\" (period= 3.906 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.323 ns + Longest memory memory " "Info: + Longest memory to memory delay is 3.323 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|ram_block1a1~porta_address_reg0 1 MEM M4K_X13_Y8 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X13_Y8; Fanout = 4; MEM Node = 'notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|ram_block1a1~porta_address_reg0'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "" { notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_e1q.tdf" "" { Text "D:/eda设计/VHDL/音乐演奏/db/altsyncram_e1q.tdf" 60 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.323 ns) 3.323 ns notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|q_a\[3\] 2 MEM M4K_X13_Y8 13 " "Info: 2: + IC(0.000 ns) + CELL(3.323 ns) = 3.323 ns; Loc. = M4K_X13_Y8; Fanout = 13; MEM Node = 'notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|q_a\[3\]'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "3.323 ns" { notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } "NODE_NAME" } "" } } { "db/altsyncram_e1q.tdf" "" { Text "D:/eda设计/VHDL/音乐演奏/db/altsyncram_e1q.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.323 ns 100.00 % " "Info: Total cell delay = 3.323 ns ( 100.00 % )" {  } {  } 0}  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "3.323 ns" { notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "3.323 ns" { notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } { 0.000ns 0.000ns } { 0.000ns 3.323ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.011 ns - Smallest " "Info: - Smallest clock skew is -0.011 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk8HZ destination 2.136 ns + Shortest memory " "Info: + Shortest clock path from clock \"clk8HZ\" to destination memory is 2.136 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns clk8HZ 1 CLK PIN_17 20 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_17; Fanout = 20; CLK Node = 'clk8HZ'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "" { clk8HZ } "NODE_NAME" } "" } } { "songer.vhd" "" { Text "D:/eda设计/VHDL/音乐演奏/songer.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.461 ns) + CELL(0.545 ns) 2.136 ns notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|q_a\[3\] 2 MEM M4K_X13_Y8 13 " "Info: 2: + IC(0.461 ns) + CELL(0.545 ns) = 2.136 ns; Loc. = M4K_X13_Y8; Fanout = 13; MEM Node = 'notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|q_a\[3\]'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "1.006 ns" { clk8HZ notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } "NODE_NAME" } "" } } { "db/altsyncram_e1q.tdf" "" { Text "D:/eda设计/VHDL/音乐演奏/db/altsyncram_e1q.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.675 ns 78.42 % " "Info: Total cell delay = 1.675 ns ( 78.42 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.461 ns 21.58 % " "Info: Total interconnect delay = 0.461 ns ( 21.58 % )" {  } {  } 0}  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "2.136 ns" { clk8HZ notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.136 ns" { clk8HZ clk8HZ~out0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } { 0.000ns 0.000ns 0.461ns } { 0.000ns 1.130ns 0.545ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk8HZ source 2.147 ns - Longest memory " "Info: - Longest clock path from clock \"clk8HZ\" to source memory is 2.147 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns clk8HZ 1 CLK PIN_17 20 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_17; Fanout = 20; CLK Node = 'clk8HZ'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "" { clk8HZ } "NODE_NAME" } "" } } { "songer.vhd" "" { Text "D:/eda设计/VHDL/音乐演奏/songer.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.461 ns) + CELL(0.556 ns) 2.147 ns notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|ram_block1a1~porta_address_reg0 2 MEM M4K_X13_Y8 4 " "Info: 2: + IC(0.461 ns) + CELL(0.556 ns) = 2.147 ns; Loc. = M4K_X13_Y8; Fanout = 4; MEM Node = 'notetabs:u1\|music:u1\|altsyncram:altsyncram_component\|altsyncram_e1q:auto_generated\|ram_block1a1~porta_address_reg0'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "1.017 ns" { clk8HZ notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_e1q.tdf" "" { Text "D:/eda设计/VHDL/音乐演奏/db/altsyncram_e1q.tdf" 60 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.686 ns 78.53 % " "Info: Total cell delay = 1.686 ns ( 78.53 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.461 ns 21.47 % " "Info: Total interconnect delay = 0.461 ns ( 21.47 % )" {  } {  } 0}  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "2.147 ns" { clk8HZ notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.147 ns" { clk8HZ clk8HZ~out0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 } { 0.000ns 0.000ns 0.461ns } { 0.000ns 1.130ns 0.556ns } } }  } 0}  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "2.136 ns" { clk8HZ notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.136 ns" { clk8HZ clk8HZ~out0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } { 0.000ns 0.000ns 0.461ns } { 0.000ns 1.130ns 0.545ns } } } { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "2.147 ns" { clk8HZ notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.147 ns" { clk8HZ clk8HZ~out0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 } { 0.000ns 0.000ns 0.461ns } { 0.000ns 1.130ns 0.556ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" {  } { { "db/altsyncram_e1q.tdf" "" { Text "D:/eda设计/VHDL/音乐演奏/db/altsyncram_e1q.tdf" 60 2 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.072 ns + " "Info: + Micro setup delay of destination is 0.072 ns" {  } { { "db/altsyncram_e1q.tdf" "" { Text "D:/eda设计/VHDL/音乐演奏/db/altsyncram_e1q.tdf" 38 2 0 } }  } 0}  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "3.323 ns" { notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "3.323 ns" { notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } { 0.000ns 0.000ns } { 0.000ns 3.323ns } } } { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "2.136 ns" { clk8HZ notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.136 ns" { clk8HZ clk8HZ~out0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|q_a[3] } { 0.000ns 0.000ns 0.461ns } { 0.000ns 1.130ns 0.545ns } } } { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "2.147 ns" { clk8HZ notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "2.147 ns" { clk8HZ clk8HZ~out0 notetabs:u1|music:u1|altsyncram:altsyncram_component|altsyncram_e1q:auto_generated|ram_block1a1~porta_address_reg0 } { 0.000ns 0.000ns 0.461ns } { 0.000ns 1.130ns 0.556ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk12MHZ spkout speaker:u3\|\\delayspks:count2 11.030 ns register " "Info: tco from clock \"clk12MHZ\" to destination pin \"spkout\" through register \"speaker:u3\|\\delayspks:count2\" is 11.030 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk12MHZ source 7.500 ns + Longest register " "Info: + Longest clock path from clock \"clk12MHZ\" to source register is 7.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.130 ns) 1.130 ns clk12MHZ 1 CLK PIN_92 4 " "Info: 1: + IC(0.000 ns) + CELL(1.130 ns) = 1.130 ns; Loc. = PIN_92; Fanout = 4; CLK Node = 'clk12MHZ'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "" { clk12MHZ } "NODE_NAME" } "" } } { "songer.vhd" "" { Text "D:/eda设计/VHDL/音乐演奏/songer.vhd" 4 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.429 ns) + CELL(0.720 ns) 2.279 ns speaker:u3\|\\divideclk:count4\[3\] 2 REG LC_X8_Y6_N4 2 " "Info: 2: + IC(0.429 ns) + CELL(0.720 ns) = 2.279 ns; Loc. = LC_X8_Y6_N4; Fanout = 2; REG Node = 'speaker:u3\|\\divideclk:count4\[3\]'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "1.149 ns" { clk12MHZ speaker:u3|\divideclk:count4[3] } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.428 ns) + CELL(0.225 ns) 2.932 ns speaker:u3\|LessThan~40 3 COMB LC_X8_Y6_N5 16 " "Info: 3: + IC(0.428 ns) + CELL(0.225 ns) = 2.932 ns; Loc. = LC_X8_Y6_N5; Fanout = 16; COMB Node = 'speaker:u3\|LessThan~40'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "0.653 ns" { speaker:u3|\divideclk:count4[3] speaker:u3|LessThan~40 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.859 ns) + CELL(0.720 ns) 6.511 ns speaker:u3\|fullspks 4 REG LC_X10_Y8_N0 1 " "Info: 4: + IC(2.859 ns) + CELL(0.720 ns) = 6.511 ns; Loc. = LC_X10_Y8_N0; Fanout = 1; REG Node = 'speaker:u3\|fullspks'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "3.579 ns" { speaker:u3|LessThan~40 speaker:u3|fullspks } "NODE_NAME" } "" } } { "speaker.vhd" "" { Text "D:/eda设计/VHDL/音乐演奏/speaker.vhd" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.442 ns) + CELL(0.547 ns) 7.500 ns speaker:u3\|\\delayspks:count2 5 REG LC_X10_Y8_N3 2 " "Info: 5: + IC(0.442 ns) + CELL(0.547 ns) = 7.500 ns; Loc. = LC_X10_Y8_N3; Fanout = 2; REG Node = 'speaker:u3\|\\delayspks:count2'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "0.989 ns" { speaker:u3|fullspks speaker:u3|\delayspks:count2 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.342 ns 44.56 % " "Info: Total cell delay = 3.342 ns ( 44.56 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.158 ns 55.44 % " "Info: Total interconnect delay = 4.158 ns ( 55.44 % )" {  } {  } 0}  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "7.500 ns" { clk12MHZ speaker:u3|\divideclk:count4[3] speaker:u3|LessThan~40 speaker:u3|fullspks speaker:u3|\delayspks:count2 } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "7.500 ns" { clk12MHZ clk12MHZ~out0 speaker:u3|\divideclk:count4[3] speaker:u3|LessThan~40 speaker:u3|fullspks speaker:u3|\delayspks:count2 } { 0.000ns 0.000ns 0.429ns 0.428ns 2.859ns 0.442ns } { 0.000ns 1.130ns 0.720ns 0.225ns 0.720ns 0.547ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.173 ns + " "Info: + Micro clock to output delay of source is 0.173 ns" {  } {  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.357 ns + Longest register pin " "Info: + Longest register to pin delay is 3.357 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns speaker:u3\|\\delayspks:count2 1 REG LC_X10_Y8_N3 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X10_Y8_N3; Fanout = 2; REG Node = 'speaker:u3\|\\delayspks:count2'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "" { speaker:u3|\delayspks:count2 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.735 ns) + CELL(1.622 ns) 3.357 ns spkout 2 PIN PIN_129 0 " "Info: 2: + IC(1.735 ns) + CELL(1.622 ns) = 3.357 ns; Loc. = PIN_129; Fanout = 0; PIN Node = 'spkout'" {  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "3.357 ns" { speaker:u3|\delayspks:count2 spkout } "NODE_NAME" } "" } } { "songer.vhd" "" { Text "D:/eda设计/VHDL/音乐演奏/songer.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.622 ns 48.32 % " "Info: Total cell delay = 1.622 ns ( 48.32 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.735 ns 51.68 % " "Info: Total interconnect delay = 1.735 ns ( 51.68 % )" {  } {  } 0}  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "3.357 ns" { speaker:u3|\delayspks:count2 spkout } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "3.357 ns" { speaker:u3|\delayspks:count2 spkout } { 0.000ns 1.735ns } { 0.000ns 1.622ns } } }  } 0}  } { { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "7.500 ns" { clk12MHZ speaker:u3|\divideclk:count4[3] speaker:u3|LessThan~40 speaker:u3|fullspks speaker:u3|\delayspks:count2 } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "7.500 ns" { clk12MHZ clk12MHZ~out0 speaker:u3|\divideclk:count4[3] speaker:u3|LessThan~40 speaker:u3|fullspks speaker:u3|\delayspks:count2 } { 0.000ns 0.000ns 0.429ns 0.428ns 2.859ns 0.442ns } { 0.000ns 1.130ns 0.720ns 0.225ns 0.720ns 0.547ns } } } { "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" "" { Report "D:/eda设计/VHDL/音乐演奏/db/speaker_cmp.qrpt" Compiler "speaker" "UNKNOWN" "V1" "D:/eda设计/VHDL/音乐演奏/db/speaker.quartus_db" { Floorplan "D:/eda设计/VHDL/音乐演奏/" "" "3.357 ns" { speaker:u3|\delayspks:count2 spkout } "NODE_NAME" } "" } } { "e:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/quartus50/bin/Technology_Viewer.qrui" "3.357 ns" { speaker:u3|\delayspks:count2 spkout } { 0.000ns 1.735ns } { 0.000ns 1.622ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 14 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 14 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Nov 26 20:05:30 2007 " "Info: Processing ended: Mon Nov 26 20:05:30 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}