clock_main.rpt

使用EPM7128设计的数字钟

Project Information       d:\gongzuo\clock\digital clock_050610\clock_main.rpt

MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 06/15/2005 16:37:20

Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input   Output   Bidir         Shareable
POF       Device          Pins    Pins     Pins     LCs  Expanders  % Utilized

clock_main
      EPM7128SLC84-15      9        22       0      126     93          98 %

User Pins:                 9        22       0  



Project Information       d:\gongzuo\clock\digital clock_050610\clock_main.rpt

** PROJECT COMPILATION MESSAGES **

Warning: GLOBAL primitive on node 'C1024Hz' feeds logic -- non-global signal usage may result
Warning: GLOBAL primitive on node 'C128Hz' feeds logic -- non-global signal usage may result


Project Information       d:\gongzuo\clock\digital clock_050610\clock_main.rpt

** AUTO GLOBAL SIGNALS **



INFO: Signal 'C128Hz' chosen for auto global Clock
INFO: Signal 'C1024Hz' chosen for auto global Clock


Project Information       d:\gongzuo\clock\digital clock_050610\clock_main.rpt

** PIN/LOCATION/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

clock_main@34                     a
clock_main@29                     b
clock_main@28                     c
clock_main@6                      C4Hz
clock_main@83                     C128Hz
clock_main@20                     C512Hz
clock_main@2                      C1024Hz
clock_main@27                     d
clock_main@31                     e
clock_main@39                     f
clock_main@41                     g
clock_main@4                      LOCATION_SEL
clock_main@69                     RING_ON
clock_main@8                      RING_ON_OFF
clock_main@60                     RING_OUT
clock_main@54                     RING_ZD
clock_main@44                     SEL_CORR
clock_main@65                     SEL_FUNCTION
clock_main@52                     SEL_H
clock_main@45                     SEL_M
clock_main@48                     SEL_RING
clock_main@51                     SEL_S
clock_main@49                     SEL_S_CLOCK
clock_main@46                     SEL1
clock_main@56                     SEL2
clock_main@57                     SEL3
clock_main@55                     SEL4
clock_main@58                     SEL5
clock_main@61                     SEL6
clock_main@10                     START_STOP
clock_main@5                      UP


Project Information       d:\gongzuo\clock\digital clock_050610\clock_main.rpt

** FILE HIERARCHY **



|74161:31|
|74161:31|p74161:sub|
|74161:174|
|74161:174|p74161:sub|
|74161:190|
|74161:190|p74161:sub|
|74161:199|
|74161:199|p74161:sub|
|clock_ring:95|
|clock_ring:95|7490:17|
|clock_ring:95|7490:16|
|clock_ring:95|7492:15|
|clock_ring:95|7492:14|
|clock_ring:95|74161:2|
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|clock_ring:95|74161:1|
|clock_ring:95|74161:1|p74161:sub|
|clock_s:96|
|clock_s:96|7490:29|
|clock_s:96|7490:31|
|clock_s:96|7490:30|
|clock_s:96|7490:28|
|clock_s:96|7492:27|
|clock_s:96|7492:34|
|clock_s:96|74161:44|
|clock_s:96|74161:44|p74161:sub|
|busmux:132|
|busmux:132|lpm_mux:40|
|busmux:132|lpm_mux:40|altshift:external_latency_ffs|
|busmux:132|lpm_mux:40|muxlut:57|
|busmux:132|lpm_mux:40|muxlut:72|
|busmux:132|lpm_mux:40|muxlut:87|
|busmux:132|lpm_mux:40|muxlut:102|
|busmux:133|
|busmux:133|lpm_mux:40|
|busmux:133|lpm_mux:40|altshift:external_latency_ffs|
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|busmux:133|lpm_mux:40|muxlut:87|
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|busmux:131|
|busmux:131|lpm_mux:40|
|busmux:131|lpm_mux:40|altshift:external_latency_ffs|
|busmux:131|lpm_mux:40|muxlut:57|
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|busmux:130|
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|busmux:130|lpm_mux:40|altshift:external_latency_ffs|
|busmux:130|lpm_mux:40|muxlut:57|
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|busmux:130|lpm_mux:40|muxlut:87|
|busmux:130|lpm_mux:40|muxlut:102|
|busmux:128|
|busmux:128|lpm_mux:40|
|busmux:128|lpm_mux:40|altshift:external_latency_ffs|
|busmux:128|lpm_mux:40|muxlut:57|
|busmux:128|lpm_mux:40|muxlut:72|
|busmux:128|lpm_mux:40|muxlut:87|
|busmux:128|lpm_mux:40|muxlut:102|
|busmux:129|
|busmux:129|lpm_mux:40|
|busmux:129|lpm_mux:40|altshift:external_latency_ffs|
|busmux:129|lpm_mux:40|muxlut:57|
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|busmux:129|lpm_mux:40|muxlut:87|
|busmux:129|lpm_mux:40|muxlut:102|
|busmux:127|
|busmux:127|lpm_mux:40|
|busmux:127|lpm_mux:40|altshift:external_latency_ffs|
|busmux:127|lpm_mux:40|muxlut:57|
|busmux:127|lpm_mux:40|muxlut:72|
|busmux:127|lpm_mux:40|muxlut:87|
|busmux:127|lpm_mux:40|muxlut:102|
|busmux:126|
|busmux:126|lpm_mux:40|
|busmux:126|lpm_mux:40|altshift:external_latency_ffs|
|busmux:126|lpm_mux:40|muxlut:57|
|busmux:126|lpm_mux:40|muxlut:72|
|busmux:126|lpm_mux:40|muxlut:87|
|busmux:126|lpm_mux:40|muxlut:102|
|busmux:125|
|busmux:125|lpm_mux:40|
|busmux:125|lpm_mux:40|altshift:external_latency_ffs|
|busmux:125|lpm_mux:40|muxlut:57|
|busmux:125|lpm_mux:40|muxlut:72|
|busmux:125|lpm_mux:40|muxlut:87|
|busmux:125|lpm_mux:40|muxlut:102|
|busmux:124|
|busmux:124|lpm_mux:40|
|busmux:124|lpm_mux:40|altshift:external_latency_ffs|
|busmux:124|lpm_mux:40|muxlut:57|
|busmux:124|lpm_mux:40|muxlut:72|
|busmux:124|lpm_mux:40|muxlut:87|
|busmux:124|lpm_mux:40|muxlut:102|
|busmux:123|
|busmux:123|lpm_mux:40|
|busmux:123|lpm_mux:40|altshift:external_latency_ffs|
|busmux:123|lpm_mux:40|muxlut:57|
|busmux:123|lpm_mux:40|muxlut:72|
|busmux:123|lpm_mux:40|muxlut:87|