i2c_altera.map.qmsg

来自「AV视频信号输入后」· QMSG 代码 · 共 136 行 · 第 1/5 页

QMSG
136
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{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 i2c_cmd.v(111) " "Warning: Verilog HDL assignment warning at i2c_cmd.v(111): truncated value with size 32 to match size of target (1)" {  } { { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 111 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 i2c_cmd.v(118) " "Warning: Verilog HDL assignment warning at i2c_cmd.v(118): truncated value with size 32 to match size of target (1)" {  } { { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 118 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 i2c_cmd.v(119) " "Warning: Verilog HDL assignment warning at i2c_cmd.v(119): truncated value with size 32 to match size of target (1)" {  } { { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 119 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 i2c_cmd.v(134) " "Warning: Verilog HDL assignment warning at i2c_cmd.v(134): truncated value with size 32 to match size of target (1)" {  } { { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 134 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 i2c_cmd.v(140) " "Warning: Verilog HDL assignment warning at i2c_cmd.v(140): truncated value with size 32 to match size of target (1)" {  } { { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 140 0 0 } }  } 0}
{ "Info" "ISGN_SEARCH_FILE" "SAA_ROM.v 1 1 " "Info: Using design file SAA_ROM.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 SAA_ROM " "Info: Found entity 1: SAA_ROM" {  } { { "SAA_ROM.v" "" { Text "E:/code/EP2C20/vbuffer1/SAA_ROM.v" 36 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "SAA_ROM SAA_ROM:inst2 " "Info: Elaborating entity \"SAA_ROM\" for hierarchy \"SAA_ROM:inst2\"" {  } { { "I2C_ALTERA.bdf" "inst2" { Schematic "E:/code/EP2C20/vbuffer1/I2C_ALTERA.bdf" { { 1312 1032 1192 1392 "inst2" "" } } } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf" 425 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram SAA_ROM:inst2\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"SAA_ROM:inst2\|altsyncram:altsyncram_component\"" {  } { { "SAA_ROM.v" "altsyncram_component" { Text "E:/code/EP2C20/vbuffer1/SAA_ROM.v" 71 -1 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_n1q.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_n1q.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_n1q " "Info: Found entity 1: altsyncram_n1q" {  } { { "db/altsyncram_n1q.tdf" "" { Text "E:/code/EP2C20/vbuffer1/db/altsyncram_n1q.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_n1q SAA_ROM:inst2\|altsyncram:altsyncram_component\|altsyncram_n1q:auto_generated " "Info: Elaborating entity \"altsyncram_n1q\" for hierarchy \"SAA_ROM:inst2\|altsyncram:altsyncram_component\|altsyncram_n1q:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/quartus50/libraries/megafunctions/altsyncram.tdf" 903 3 0 } }  } 0}
{ "Info" "ISGN_SEARCH_FILE" "Led_run.v 1 1 " "Info: Using design file Led_run.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 Led_run " "Info: Found entity 1: Led_run" {  } { { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "Led_run Led_run:inst21 " "Info: Elaborating entity \"Led_run\" for hierarchy \"Led_run:inst21\"" {  } { { "I2C_ALTERA.bdf" "inst21" { Schematic "E:/code/EP2C20/vbuffer1/I2C_ALTERA.bdf" { { 808 264 360 904 "inst21" "" } } } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 24 Led_run.v(14) " "Warning: Verilog HDL assignment warning at Led_run.v(14): truncated value with size 32 to match size of target (24)" {  } { { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 14 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 24 Led_run.v(18) " "Warning: Verilog HDL assignment warning at Led_run.v(18): truncated value with size 32 to match size of target (24)" {  } { { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 18 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 Led_run.v(31) " "Warning: Verilog HDL assignment warning at Led_run.v(31): truncated value with size 32 to match size of target (1)" {  } { { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 31 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 Led_run.v(36) " "Warning: Verilog HDL assignment warning at Led_run.v(36): truncated value with size 32 to match size of target (1)" {  } { { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 36 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 Led_run.v(39) " "Warning: Verilog HDL assignment warning at Led_run.v(39): truncated value with size 32 to match size of target (1)" {  } { { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 39 0 0 } }  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd 3 1 " "Info: Found 3 design units, including 1 entities, in source file c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_signaltap_pack " "Info: Found design unit 1: sld_signaltap_pack" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 62 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_signaltap-rtl " "Info: Found design unit 2: sld_signaltap-rtl" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 170 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_signaltap " "Info: Found entity 1: sld_signaltap" {  } { { "sld_signaltap.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_signaltap.vhd" 85 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd 14 7 " "Info: Found 14 design units, including 7 entities, in source file c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_ela_control-rtl " "Info: Found design unit 1: sld_ela_control-rtl" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 118 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_ela_level_seq_mgr-rtl " "Info: Found design unit 2: sld_ela_level_seq_mgr-rtl" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 844 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "3 sld_ela_state_machine-rtl " "Info: Found design unit 3: sld_ela_state_machine-rtl" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1022 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "4 sld_ela_seg_state_machine-rtl " "Info: Found design unit 4: sld_ela_seg_state_machine-rtl" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1125 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "5 sld_ela_post_trigger_counter-rtl " "Info: Found design unit 5: sld_ela_post_trigger_counter-rtl" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1215 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "6 sld_ela_segment_mgr-rtl " "Info: Found design unit 6: sld_ela_segment_mgr-rtl" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1342 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "7 sld_ela_basic_multi_level_trigger-rtl " "Info: Found design unit 7: sld_ela_basic_multi_level_trigger-rtl" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1521 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_ela_control " "Info: Found entity 1: sld_ela_control" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 67 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_ela_level_seq_mgr " "Info: Found entity 2: sld_ela_level_seq_mgr" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 817 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "3 sld_ela_state_machine " "Info: Found entity 3: sld_ela_state_machine" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1000 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "4 sld_ela_seg_state_machine " "Info: Found entity 4: sld_ela_seg_state_machine" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1105 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "5 sld_ela_post_trigger_counter " "Info: Found entity 5: sld_ela_post_trigger_counter" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1195 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "6 sld_ela_segment_mgr " "Info: Found entity 6: sld_ela_segment_mgr" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1319 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "7 sld_ela_basic_multi_level_trigger " "Info: Found entity 7: sld_ela_basic_multi_level_trigger" {  } { { "sld_ela_control.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_ela_control.vhd" 1487 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/megafunctions/lpm_shiftreg.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus50/libraries/megafunctions/lpm_shiftreg.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_shiftreg " "Info: Found entity 1: lpm_shiftreg" {  } { { "lpm_shiftreg.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_shiftreg.tdf" 37 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/megafunctions/sld_mbpmg.vhd 4 2 " "Info: Found 4 design units, including 2 entities, in source file c:/altera/quartus50/libraries/megafunctions/sld_mbpmg.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_mbpmg-rtl " "Info: Found design unit 1: sld_mbpmg-rtl" {  } { { "sld_mbpmg.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_mbpmg.vhd" 65 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_sbpmg-rtl " "Info: Found design unit 2: sld_sbpmg-rtl" {  } { { "sld_mbpmg.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_mbpmg.vhd" 293 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_mbpmg " "Info: Found entity 1: sld_mbpmg" {  } { { "sld_mbpmg.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_mbpmg.vhd" 44 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_sbpmg " "Info: Found entity 2: sld_sbpmg" {  } { { "sld_mbpmg.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_mbpmg.vhd" 272 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_809.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_809.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_809 " "Info: Found entity 1: cntr_809" {  } { { "db/cntr_809.tdf" "" { Text "E:/code/EP2C20/vbuffer1/db/cntr_809.tdf" 27 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_0a9.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_0a9.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_0a9 " "Info: Found entity 1: cntr_0a9" {  } { { "db/cntr_0a9.tdf" "" { Text "E:/code/EP2C20/vbuffer1/db/cntr_0a9.tdf" 27 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd 4 2 " "Info: Found 4 design units, including 2 entities, in source file c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_acquisition_buffer-rtl " "Info: Found design unit 1: sld_acquisition_buffer-rtl" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 73 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_offload_buffer_mgr-rtl " "Info: Found design unit 2: sld_offload_buffer_mgr-rtl" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 308 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_acquisition_buffer " "Info: Found entity 1: sld_acquisition_buffer" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 46 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_offload_buffer_mgr " "Info: Found entity 2: sld_offload_buffer_mgr" {  } { { "sld_acquisition_buffer.vhd" "" { Text "c:/altera/quartus50/libraries/megafunctions/sld_acquisition_buffer.vhd" 271 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_95a.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_95a.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_95a " "Info: Found entity 1: cntr_95a" {  } { { "db/cntr_95a.tdf" "" { Text "E:/code/EP2C20/vbuffer1/db/cntr_95a.tdf" 27 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus50/libraries/megafunctions/lpm_ff.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus50/libraries/megafunctions/lpm_ff.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_ff " "Info: Found entity 1: lpm_ff" {  } { { "lpm_ff.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_ff.tdf" 46 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_nm92.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_nm92.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_nm92 " "Info: Found entity 1: altsyncram_nm92" {  } { { "db/altsyncram_nm92.tdf" "" { Text "E:/code/EP2C20/vbuffer1/db/altsyncram_nm92.tdf" 24 1 0 } }  } 0}  } {  } 0}

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