mux_7lb.tdf

来自「AV视频信号输入后」· TDF 代码 · 共 416 行 · 第 1/3 页

	l1_w5_n1_mux_dataout	:	WIRE;
	l1_w60_n0_mux_dataout	:	WIRE;
	l1_w60_n1_mux_dataout	:	WIRE;
	l1_w61_n0_mux_dataout	:	WIRE;
	l1_w61_n1_mux_dataout	:	WIRE;
	l1_w62_n0_mux_dataout	:	WIRE;
	l1_w62_n1_mux_dataout	:	WIRE;
	l1_w6_n0_mux_dataout	:	WIRE;
	l1_w6_n1_mux_dataout	:	WIRE;
	l1_w7_n0_mux_dataout	:	WIRE;
	l1_w7_n1_mux_dataout	:	WIRE;
	l1_w8_n0_mux_dataout	:	WIRE;
	l1_w8_n1_mux_dataout	:	WIRE;
	l1_w9_n0_mux_dataout	:	WIRE;
	l1_w9_n1_mux_dataout	:	WIRE;
	l2_w0_n0_mux_dataout	:	WIRE;
	l2_w10_n0_mux_dataout	:	WIRE;
	l2_w11_n0_mux_dataout	:	WIRE;
	l2_w12_n0_mux_dataout	:	WIRE;
	l2_w13_n0_mux_dataout	:	WIRE;
	l2_w14_n0_mux_dataout	:	WIRE;
	l2_w15_n0_mux_dataout	:	WIRE;
	l2_w16_n0_mux_dataout	:	WIRE;
	l2_w17_n0_mux_dataout	:	WIRE;
	l2_w18_n0_mux_dataout	:	WIRE;
	l2_w19_n0_mux_dataout	:	WIRE;
	l2_w1_n0_mux_dataout	:	WIRE;
	l2_w20_n0_mux_dataout	:	WIRE;
	l2_w21_n0_mux_dataout	:	WIRE;
	l2_w22_n0_mux_dataout	:	WIRE;
	l2_w23_n0_mux_dataout	:	WIRE;
	l2_w24_n0_mux_dataout	:	WIRE;
	l2_w25_n0_mux_dataout	:	WIRE;
	l2_w26_n0_mux_dataout	:	WIRE;
	l2_w27_n0_mux_dataout	:	WIRE;
	l2_w28_n0_mux_dataout	:	WIRE;
	l2_w29_n0_mux_dataout	:	WIRE;
	l2_w2_n0_mux_dataout	:	WIRE;
	l2_w30_n0_mux_dataout	:	WIRE;
	l2_w31_n0_mux_dataout	:	WIRE;
	l2_w32_n0_mux_dataout	:	WIRE;
	l2_w33_n0_mux_dataout	:	WIRE;
	l2_w34_n0_mux_dataout	:	WIRE;
	l2_w35_n0_mux_dataout	:	WIRE;
	l2_w36_n0_mux_dataout	:	WIRE;
	l2_w37_n0_mux_dataout	:	WIRE;
	l2_w38_n0_mux_dataout	:	WIRE;
	l2_w39_n0_mux_dataout	:	WIRE;
	l2_w3_n0_mux_dataout	:	WIRE;
	l2_w40_n0_mux_dataout	:	WIRE;
	l2_w41_n0_mux_dataout	:	WIRE;
	l2_w42_n0_mux_dataout	:	WIRE;
	l2_w43_n0_mux_dataout	:	WIRE;
	l2_w44_n0_mux_dataout	:	WIRE;
	l2_w45_n0_mux_dataout	:	WIRE;
	l2_w46_n0_mux_dataout	:	WIRE;
	l2_w47_n0_mux_dataout	:	WIRE;
	l2_w48_n0_mux_dataout	:	WIRE;
	l2_w49_n0_mux_dataout	:	WIRE;
	l2_w4_n0_mux_dataout	:	WIRE;
	l2_w50_n0_mux_dataout	:	WIRE;
	l2_w51_n0_mux_dataout	:	WIRE;
	l2_w52_n0_mux_dataout	:	WIRE;
	l2_w53_n0_mux_dataout	:	WIRE;
	l2_w54_n0_mux_dataout	:	WIRE;
	l2_w55_n0_mux_dataout	:	WIRE;
	l2_w56_n0_mux_dataout	:	WIRE;
	l2_w57_n0_mux_dataout	:	WIRE;
	l2_w58_n0_mux_dataout	:	WIRE;
	l2_w59_n0_mux_dataout	:	WIRE;
	l2_w5_n0_mux_dataout	:	WIRE;
	l2_w60_n0_mux_dataout	:	WIRE;
	l2_w61_n0_mux_dataout	:	WIRE;
	l2_w62_n0_mux_dataout	:	WIRE;
	l2_w6_n0_mux_dataout	:	WIRE;
	l2_w7_n0_mux_dataout	:	WIRE;
	l2_w8_n0_mux_dataout	:	WIRE;
	l2_w9_n0_mux_dataout	:	WIRE;
	data_wire[377..0]	: WIRE;
	sel_wire[1..0]	: WIRE;

BEGIN 
	l1_w0_n0_mux_dataout = sel_wire[0..0] & data_wire[63..63] # !(sel_wire[0..0]) & data_wire[0..0];
	l1_w0_n1_mux_dataout = sel_wire[0..0] & data_wire[189..189] # !(sel_wire[0..0]) & data_wire[126..126];
	l1_w10_n0_mux_dataout = sel_wire[0..0] & data_wire[73..73] # !(sel_wire[0..0]) & data_wire[10..10];
	l1_w10_n1_mux_dataout = sel_wire[0..0] & data_wire[199..199] # !(sel_wire[0..0]) & data_wire[136..136];
	l1_w11_n0_mux_dataout = sel_wire[0..0] & data_wire[74..74] # !(sel_wire[0..0]) & data_wire[11..11];
	l1_w11_n1_mux_dataout = sel_wire[0..0] & data_wire[200..200] # !(sel_wire[0..0]) & data_wire[137..137];
	l1_w12_n0_mux_dataout = sel_wire[0..0] & data_wire[75..75] # !(sel_wire[0..0]) & data_wire[12..12];
	l1_w12_n1_mux_dataout = sel_wire[0..0] & data_wire[201..201] # !(sel_wire[0..0]) & data_wire[138..138];
	l1_w13_n0_mux_dataout = sel_wire[0..0] & data_wire[76..76] # !(sel_wire[0..0]) & data_wire[13..13];
	l1_w13_n1_mux_dataout = sel_wire[0..0] & data_wire[202..202] # !(sel_wire[0..0]) & data_wire[139..139];
	l1_w14_n0_mux_dataout = sel_wire[0..0] & data_wire[77..77] # !(sel_wire[0..0]) & data_wire[14..14];
	l1_w14_n1_mux_dataout = sel_wire[0..0] & data_wire[203..203] # !(sel_wire[0..0]) & data_wire[140..140];
	l1_w15_n0_mux_dataout = sel_wire[0..0] & data_wire[78..78] # !(sel_wire[0..0]) & data_wire[15..15];
	l1_w15_n1_mux_dataout = sel_wire[0..0] & data_wire[204..204] # !(sel_wire[0..0]) & data_wire[141..141];
	l1_w16_n0_mux_dataout = sel_wire[0..0] & data_wire[79..79] # !(sel_wire[0..0]) & data_wire[16..16];
	l1_w16_n1_mux_dataout = sel_wire[0..0] & data_wire[205..205] # !(sel_wire[0..0]) & data_wire[142..142];
	l1_w17_n0_mux_dataout = sel_wire[0..0] & data_wire[80..80] # !(sel_wire[0..0]) & data_wire[17..17];
	l1_w17_n1_mux_dataout = sel_wire[0..0] & data_wire[206..206] # !(sel_wire[0..0]) & data_wire[143..143];
	l1_w18_n0_mux_dataout = sel_wire[0..0] & data_wire[81..81] # !(sel_wire[0..0]) & data_wire[18..18];
	l1_w18_n1_mux_dataout = sel_wire[0..0] & data_wire[207..207] # !(sel_wire[0..0]) & data_wire[144..144];
	l1_w19_n0_mux_dataout = sel_wire[0..0] & data_wire[82..82] # !(sel_wire[0..0]) & data_wire[19..19];
	l1_w19_n1_mux_dataout = sel_wire[0..0] & data_wire[208..208] # !(sel_wire[0..0]) & data_wire[145..145];
	l1_w1_n0_mux_dataout = sel_wire[0..0] & data_wire[64..64] # !(sel_wire[0..0]) & data_wire[1..1];
	l1_w1_n1_mux_dataout = sel_wire[0..0] & data_wire[190..190] # !(sel_wire[0..0]) & data_wire[127..127];
	l1_w20_n0_mux_dataout = sel_wire[0..0] & data_wire[83..83] # !(sel_wire[0..0]) & data_wire[20..20];
	l1_w20_n1_mux_dataout = sel_wire[0..0] & data_wire[209..209] # !(sel_wire[0..0]) & data_wire[146..146];
	l1_w21_n0_mux_dataout = sel_wire[0..0] & data_wire[84..84] # !(sel_wire[0..0]) & data_wire[21..21];
	l1_w21_n1_mux_dataout = sel_wire[0..0] & data_wire[210..210] # !(sel_wire[0..0]) & data_wire[147..147];
	l1_w22_n0_mux_dataout = sel_wire[0..0] & data_wire[85..85] # !(sel_wire[0..0]) & data_wire[22..22];
	l1_w22_n1_mux_dataout = sel_wire[0..0] & data_wire[211..211] # !(sel_wire[0..0]) & data_wire[148..148];
	l1_w23_n0_mux_dataout = sel_wire[0..0] & data_wire[86..86] # !(sel_wire[0..0]) & data_wire[23..23];
	l1_w23_n1_mux_dataout = sel_wire[0..0] & data_wire[212..212] # !(sel_wire[0..0]) & data_wire[149..149];
	l1_w24_n0_mux_dataout = sel_wire[0..0] & data_wire[87..87] # !(sel_wire[0..0]) & data_wire[24..24];
	l1_w24_n1_mux_dataout = sel_wire[0..0] & data_wire[213..213] # !(sel_wire[0..0]) & data_wire[150..150];
	l1_w25_n0_mux_dataout = sel_wire[0..0] & data_wire[88..88] # !(sel_wire[0..0]) & data_wire[25..25];
	l1_w25_n1_mux_dataout = sel_wire[0..0] & data_wire[214..214] # !(sel_wire[0..0]) & data_wire[151..151];
	l1_w26_n0_mux_dataout = sel_wire[0..0] & data_wire[89..89] # !(sel_wire[0..0]) & data_wire[26..26];
	l1_w26_n1_mux_dataout = sel_wire[0..0] & data_wire[215..215] # !(sel_wire[0..0]) & data_wire[152..152];
	l1_w27_n0_mux_dataout = sel_wire[0..0] & data_wire[90..90] # !(sel_wire[0..0]) & data_wire[27..27];
	l1_w27_n1_mux_dataout = sel_wire[0..0] & data_wire[216..216] # !(sel_wire[0..0]) & data_wire[153..153];
	l1_w28_n0_mux_dataout = sel_wire[0..0] & data_wire[91..91] # !(sel_wire[0..0]) & data_wire[28..28];
	l1_w28_n1_mux_dataout = sel_wire[0..0] & data_wire[217..217] # !(sel_wire[0..0]) & data_wire[154..154];
	l1_w29_n0_mux_dataout = sel_wire[0..0] & data_wire[92..92] # !(sel_wire[0..0]) & data_wire[29..29];
	l1_w29_n1_mux_dataout = sel_wire[0..0] & data_wire[218..218] # !(sel_wire[0..0]) & data_wire[155..155];
	l1_w2_n0_mux_dataout = sel_wire[0..0] & data_wire[65..65] # !(sel_wire[0..0]) & data_wire[2..2];
	l1_w2_n1_mux_dataout = sel_wire[0..0] & data_wire[191..191] # !(sel_wire[0..0]) & data_wire[128..128];
	l1_w30_n0_mux_dataout = sel_wire[0..0] & data_wire[93..93] # !(sel_wire[0..0]) & data_wire[30..30];
	l1_w30_n1_mux_dataout = sel_wire[0..0] & data_wire[219..219] # !(sel_wire[0..0]) & data_wire[156..156];
	l1_w31_n0_mux_dataout = sel_wire[0..0] & data_wire[94..94] # !(sel_wire[0..0]) & data_wire[31..31];
	l1_w31_n1_mux_dataout = sel_wire[0..0] & data_wire[220..220] # !(sel_wire[0..0]) & data_wire[157..157];
	l1_w32_n0_mux_dataout = sel_wire[0..0] & data_wire[95..95] # !(sel_wire[0..0]) & data_wire[32..32];
	l1_w32_n1_mux_dataout = sel_wire[0..0] & data_wire[221..221] # !(sel_wire[0..0]) & data_wire[158..158];
	l1_w33_n0_mux_dataout = sel_wire[0..0] & data_wire[96..96] # !(sel_wire[0..0]) & data_wire[33..33];
	l1_w33_n1_mux_dataout = sel_wire[0..0] & data_wire[222..222] # !(sel_wire[0..0]) & data_wire[159..159];
	l1_w34_n0_mux_dataout = sel_wire[0..0] & data_wire[97..97] # !(sel_wire[0..0]) & data_wire[34..34];
	l1_w34_n1_mux_dataout = sel_wire[0..0] & data_wire[223..223] # !(sel_wire[0..0]) & data_wire[160..160];
	l1_w35_n0_mux_dataout = sel_wire[0..0] & data_wire[98..98] # !(sel_wire[0..0]) & data_wire[35..35];