i2c_altera.tan.qmsg

AV视频信号输入后

{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "3 " "Warning: Found 3 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "filter:inst8\|cnt\[15\] " "Info: Detected ripple clock \"filter:inst8\|cnt\[15\]\" as buffer" {  } { { "filter.v" "" { Text "E:/code/EP2C20/vbuffer1/filter.v" 7 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "filter:inst8\|cnt\[15\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "Led_run:inst21\|Mega_cnt\[0\] " "Info: Detected ripple clock \"Led_run:inst21\|Mega_cnt\[0\]\" as buffer" {  } { { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 7 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Led_run:inst21\|Mega_cnt\[0\]" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "Led_run:inst21\|Mega_cnt\[23\] " "Info: Detected ripple clock \"Led_run:inst21\|Mega_cnt\[23\]\" as buffer" {  } { { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 7 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "Led_run:inst21\|Mega_cnt\[23\]" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "SYSCLK register i2c_cmd:inst\|rom_addr\[0\] register i2c_cmd:inst\|rom_addr\[5\] 178.19 MHz 5.612 ns Internal " "Info: Clock \"SYSCLK\" has Internal fmax of 178.19 MHz between source register \"i2c_cmd:inst\|rom_addr\[0\]\" and destination register \"i2c_cmd:inst\|rom_addr\[5\]\" (period= 5.612 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.341 ns + Longest register register " "Info: + Longest register to register delay is 5.341 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns i2c_cmd:inst\|rom_addr\[0\] 1 REG LCFF_X38_Y6_N29 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X38_Y6_N29; Fanout = 4; REG Node = 'i2c_cmd:inst\|rom_addr\[0\]'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "" { i2c_cmd:inst|rom_addr[0] } "NODE_NAME" } "" } } { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.451 ns) + CELL(0.636 ns) 1.087 ns i2c_cmd:inst\|always0~183 2 COMB LCCOMB_X38_Y6_N26 1 " "Info: 2: + IC(0.451 ns) + CELL(0.636 ns) = 1.087 ns; Loc. = LCCOMB_X38_Y6_N26; Fanout = 1; COMB Node = 'i2c_cmd:inst\|always0~183'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "1.087 ns" { i2c_cmd:inst|rom_addr[0] i2c_cmd:inst|always0~183 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.360 ns) + CELL(0.210 ns) 1.657 ns i2c_cmd:inst\|always0~184 3 COMB LCCOMB_X38_Y6_N18 1 " "Info: 3: + IC(0.360 ns) + CELL(0.210 ns) = 1.657 ns; Loc. = LCCOMB_X38_Y6_N18; Fanout = 1; COMB Node = 'i2c_cmd:inst\|always0~184'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.570 ns" { i2c_cmd:inst|always0~183 i2c_cmd:inst|always0~184 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.371 ns) + CELL(0.210 ns) 2.238 ns i2c_cmd:inst\|always0~185 4 COMB LCCOMB_X38_Y6_N30 4 " "Info: 4: + IC(0.371 ns) + CELL(0.210 ns) = 2.238 ns; Loc. = LCCOMB_X38_Y6_N30; Fanout = 4; COMB Node = 'i2c_cmd:inst\|always0~185'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.581 ns" { i2c_cmd:inst|always0~184 i2c_cmd:inst|always0~185 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.380 ns) + CELL(0.601 ns) 3.219 ns i2c_cmd:inst\|add~107 5 COMB LCCOMB_X38_Y6_N4 2 " "Info: 5: + IC(0.380 ns) + CELL(0.601 ns) = 3.219 ns; Loc. = LCCOMB_X38_Y6_N4; Fanout = 2; COMB Node = 'i2c_cmd:inst\|add~107'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.981 ns" { i2c_cmd:inst|always0~185 i2c_cmd:inst|add~107 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.062 ns) 3.281 ns i2c_cmd:inst\|add~109 6 COMB LCCOMB_X38_Y6_N6 2 " "Info: 6: + IC(0.000 ns) + CELL(0.062 ns) = 3.281 ns; Loc. = LCCOMB_X38_Y6_N6; Fanout = 2; COMB Node = 'i2c_cmd:inst\|add~109'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.062 ns" { i2c_cmd:inst|add~107 i2c_cmd:inst|add~109 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.062 ns) 3.343 ns i2c_cmd:inst\|add~111 7 COMB LCCOMB_X38_Y6_N8 2 " "Info: 7: + IC(0.000 ns) + CELL(0.062 ns) = 3.343 ns; Loc. = LCCOMB_X38_Y6_N8; Fanout = 2; COMB Node = 'i2c_cmd:inst\|add~111'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.062 ns" { i2c_cmd:inst|add~109 i2c_cmd:inst|add~111 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.062 ns) 3.405 ns i2c_cmd:inst\|add~113 8 COMB LCCOMB_X38_Y6_N10 2 " "Info: 8: + IC(0.000 ns) + CELL(0.062 ns) = 3.405 ns; Loc. = LCCOMB_X38_Y6_N10; Fanout = 2; COMB Node = 'i2c_cmd:inst\|add~113'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.062 ns" { i2c_cmd:inst|add~111 i2c_cmd:inst|add~113 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.062 ns) 3.467 ns i2c_cmd:inst\|add~115 9 COMB LCCOMB_X38_Y6_N12 2 " "Info: 9: + IC(0.000 ns) + CELL(0.062 ns) = 3.467 ns; Loc. = LCCOMB_X38_Y6_N12; Fanout = 2; COMB Node = 'i2c_cmd:inst\|add~115'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.062 ns" { i2c_cmd:inst|add~113 i2c_cmd:inst|add~115 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.516 ns) 3.983 ns i2c_cmd:inst\|add~116 10 COMB LCCOMB_X38_Y6_N14 1 " "Info: 10: + IC(0.000 ns) + CELL(0.516 ns) = 3.983 ns; Loc. = LCCOMB_X38_Y6_N14; Fanout = 1; COMB Node = 'i2c_cmd:inst\|add~116'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.516 ns" { i2c_cmd:inst|add~115 i2c_cmd:inst|add~116 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.612 ns) + CELL(0.636 ns) 5.231 ns i2c_cmd:inst\|Select~1062 11 COMB LCCOMB_X37_Y6_N10 1 " "Info: 11: + IC(0.612 ns) + CELL(0.636 ns) = 5.231 ns; Loc. = LCCOMB_X37_Y6_N10; Fanout = 1; COMB Node = 'i2c_cmd:inst\|Select~1062'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "1.248 ns" { i2c_cmd:inst|add~116 i2c_cmd:inst|Select~1062 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.110 ns) 5.341 ns i2c_cmd:inst\|rom_addr\[5\] 12 REG LCFF_X37_Y6_N11 5 " "Info: 12: + IC(0.000 ns) + CELL(0.110 ns) = 5.341 ns; Loc. = LCFF_X37_Y6_N11; Fanout = 5; REG Node = 'i2c_cmd:inst\|rom_addr\[5\]'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.110 ns" { i2c_cmd:inst|Select~1062 i2c_cmd:inst|rom_addr[5] } "NODE_NAME" } "" } } { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 10 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.167 ns 59.30 % " "Info: Total cell delay = 3.167 ns ( 59.30 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.174 ns 40.70 % " "Info: Total interconnect delay = 2.174 ns ( 40.70 % )" {  } {  } 0}  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "5.341 ns" { i2c_cmd:inst|rom_addr[0] i2c_cmd:inst|always0~183 i2c_cmd:inst|always0~184 i2c_cmd:inst|always0~185 i2c_cmd:inst|add~107 i2c_cmd:inst|add~109 i2c_cmd:inst|add~111 i2c_cmd:inst|add~113 i2c_cmd:inst|add~115 i2c_cmd:inst|add~116 i2c_cmd:inst|Select~1062 i2c_cmd:inst|rom_addr[5] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.341 ns" { i2c_cmd:inst|rom_addr[0] i2c_cmd:inst|always0~183 i2c_cmd:inst|always0~184 i2c_cmd:inst|always0~185 i2c_cmd:inst|add~107 i2c_cmd:inst|add~109 i2c_cmd:inst|add~111 i2c_cmd:inst|add~113 i2c_cmd:inst|add~115 i2c_cmd:inst|add~116 i2c_cmd:inst|Select~1062 i2c_cmd:inst|rom_addr[5] } { 0.000ns 0.451ns 0.360ns 0.371ns 0.380ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.612ns 0.000ns } { 0.000ns 0.636ns 0.210ns 0.210ns 0.601ns 0.062ns 0.062ns 0.062ns 0.062ns 0.516ns 0.636ns 0.110ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.001 ns - Smallest " "Info: - Smallest clock skew is -0.001 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "SYSCLK destination 5.862 ns + Shortest register " "Info: + Shortest clock path from clock \"SYSCLK\" to destination register is 5.862 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns SYSCLK 1 CLK PIN_W12 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_W12; Fanout = 1; CLK Node = 'SYSCLK'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "" { SYSCLK } "NODE_NAME" } "" } } { "I2C_ALTERA.bdf" "" { Schematic "E:/code/EP2C20/vbuffer1/I2C_ALTERA.bdf" { { 1528 160 328 1544 "SYSCLK" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.117 ns) + CELL(0.000 ns) 1.217 ns SYSCLK~clkctrl 2 COMB CLKCTRL_G14 55 " "Info: 2: + IC(0.117 ns) + CELL(0.000 ns) = 1.217 ns; Loc. = CLKCTRL_G14; Fanout = 55; COMB Node = 'SYSCLK~clkctrl'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.117 ns" { SYSCLK SYSCLK~clkctrl } "NODE_NAME" } "" } } { "I2C_ALTERA.bdf" "" { Schematic "E:/code/EP2C20/vbuffer1/I2C_ALTERA.bdf" { { 1528 160 328 1544 "SYSCLK" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.078 ns) + CELL(0.989 ns) 3.284 ns Led_run:inst21\|Mega_cnt\[0\] 3 REG LCFF_X27_Y2_N9 3 " "Info: 3: + IC(1.078 ns) + CELL(0.989 ns) = 3.284 ns; Loc. = LCFF_X27_Y2_N9; Fanout = 3; REG Node = 'Led_run:inst21\|Mega_cnt\[0\]'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "2.067 ns" { SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] } "NODE_NAME" } "" } } { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.826 ns) + CELL(0.000 ns) 4.110 ns Led_run:inst21\|Mega_cnt\[0\]~clkctrl 4 COMB CLKCTRL_G12 74 " "Info: 4: + IC(0.826 ns) + CELL(0.000 ns) = 4.110 ns; Loc. = CLKCTRL_G12; Fanout = 74; COMB Node = 'Led_run:inst21\|Mega_cnt\[0\]~clkctrl'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.826 ns" { Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl } "NODE_NAME" } "" } } { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.679 ns) 5.862 ns i2c_cmd:inst\|rom_addr\[5\] 5 REG LCFF_X37_Y6_N11 5 " "Info: 5: + IC(1.073 ns) + CELL(0.679 ns) = 5.862 ns; Loc. = LCFF_X37_Y6_N11; Fanout = 5; REG Node = 'i2c_cmd:inst\|rom_addr\[5\]'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "1.752 ns" { Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[5] } "NODE_NAME" } "" } } { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 10 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.768 ns 47.22 % " "Info: Total cell delay = 2.768 ns ( 47.22 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.094 ns 52.78 % " "Info: Total interconnect delay = 3.094 ns ( 52.78 % )" {  } {  } 0}  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "5.862 ns" { SYSCLK SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[5] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.862 ns" { SYSCLK SYSCLK~combout SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[5] } { 0.000ns 0.000ns 0.117ns 1.078ns 0.826ns 1.073ns } { 0.000ns 1.100ns 0.000ns 0.989ns 0.000ns 0.679ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "SYSCLK source 5.863 ns - Longest register " "Info: - Longest clock path from clock \"SYSCLK\" to source register is 5.863 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.100 ns) 1.100 ns SYSCLK 1 CLK PIN_W12 1 " "Info: 1: + IC(0.000 ns) + CELL(1.100 ns) = 1.100 ns; Loc. = PIN_W12; Fanout = 1; CLK Node = 'SYSCLK'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "" { SYSCLK } "NODE_NAME" } "" } } { "I2C_ALTERA.bdf" "" { Schematic "E:/code/EP2C20/vbuffer1/I2C_ALTERA.bdf" { { 1528 160 328 1544 "SYSCLK" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.117 ns) + CELL(0.000 ns) 1.217 ns SYSCLK~clkctrl 2 COMB CLKCTRL_G14 55 " "Info: 2: + IC(0.117 ns) + CELL(0.000 ns) = 1.217 ns; Loc. = CLKCTRL_G14; Fanout = 55; COMB Node = 'SYSCLK~clkctrl'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.117 ns" { SYSCLK SYSCLK~clkctrl } "NODE_NAME" } "" } } { "I2C_ALTERA.bdf" "" { Schematic "E:/code/EP2C20/vbuffer1/I2C_ALTERA.bdf" { { 1528 160 328 1544 "SYSCLK" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.078 ns) + CELL(0.989 ns) 3.284 ns Led_run:inst21\|Mega_cnt\[0\] 3 REG LCFF_X27_Y2_N9 3 " "Info: 3: + IC(1.078 ns) + CELL(0.989 ns) = 3.284 ns; Loc. = LCFF_X27_Y2_N9; Fanout = 3; REG Node = 'Led_run:inst21\|Mega_cnt\[0\]'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "2.067 ns" { SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] } "NODE_NAME" } "" } } { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.826 ns) + CELL(0.000 ns) 4.110 ns Led_run:inst21\|Mega_cnt\[0\]~clkctrl 4 COMB CLKCTRL_G12 74 " "Info: 4: + IC(0.826 ns) + CELL(0.000 ns) = 4.110 ns; Loc. = CLKCTRL_G12; Fanout = 74; COMB Node = 'Led_run:inst21\|Mega_cnt\[0\]~clkctrl'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "0.826 ns" { Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl } "NODE_NAME" } "" } } { "Led_run.v" "" { Text "E:/code/EP2C20/vbuffer1/Led_run.v" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.074 ns) + CELL(0.679 ns) 5.863 ns i2c_cmd:inst\|rom_addr\[0\] 5 REG LCFF_X38_Y6_N29 4 " "Info: 5: + IC(1.074 ns) + CELL(0.679 ns) = 5.863 ns; Loc. = LCFF_X38_Y6_N29; Fanout = 4; REG Node = 'i2c_cmd:inst\|rom_addr\[0\]'" {  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "1.753 ns" { Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[0] } "NODE_NAME" } "" } } { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 10 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.768 ns 47.21 % " "Info: Total cell delay = 2.768 ns ( 47.21 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.095 ns 52.79 % " "Info: Total interconnect delay = 3.095 ns ( 52.79 % )" {  } {  } 0}  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "5.863 ns" { SYSCLK SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[0] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.863 ns" { SYSCLK SYSCLK~combout SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[0] } { 0.000ns 0.000ns 0.117ns 1.078ns 0.826ns 1.074ns } { 0.000ns 1.100ns 0.000ns 0.989ns 0.000ns 0.679ns } } }  } 0}  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "5.862 ns" { SYSCLK SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[5] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.862 ns" { SYSCLK SYSCLK~combout SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[5] } { 0.000ns 0.000ns 0.117ns 1.078ns 0.826ns 1.073ns } { 0.000ns 1.100ns 0.000ns 0.989ns 0.000ns 0.679ns } } } { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "5.863 ns" { SYSCLK SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[0] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.863 ns" { SYSCLK SYSCLK~combout SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[0] } { 0.000ns 0.000ns 0.117ns 1.078ns 0.826ns 1.074ns } { 0.000ns 1.100ns 0.000ns 0.989ns 0.000ns 0.679ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.310 ns + " "Info: + Micro clock to output delay of source is 0.310 ns" {  } { { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 10 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "i2c_cmd.v" "" { Text "E:/code/EP2C20/vbuffer1/i2c_cmd.v" 10 -1 0 } }  } 0}  } { { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "5.341 ns" { i2c_cmd:inst|rom_addr[0] i2c_cmd:inst|always0~183 i2c_cmd:inst|always0~184 i2c_cmd:inst|always0~185 i2c_cmd:inst|add~107 i2c_cmd:inst|add~109 i2c_cmd:inst|add~111 i2c_cmd:inst|add~113 i2c_cmd:inst|add~115 i2c_cmd:inst|add~116 i2c_cmd:inst|Select~1062 i2c_cmd:inst|rom_addr[5] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.341 ns" { i2c_cmd:inst|rom_addr[0] i2c_cmd:inst|always0~183 i2c_cmd:inst|always0~184 i2c_cmd:inst|always0~185 i2c_cmd:inst|add~107 i2c_cmd:inst|add~109 i2c_cmd:inst|add~111 i2c_cmd:inst|add~113 i2c_cmd:inst|add~115 i2c_cmd:inst|add~116 i2c_cmd:inst|Select~1062 i2c_cmd:inst|rom_addr[5] } { 0.000ns 0.451ns 0.360ns 0.371ns 0.380ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.612ns 0.000ns } { 0.000ns 0.636ns 0.210ns 0.210ns 0.601ns 0.062ns 0.062ns 0.062ns 0.062ns 0.516ns 0.636ns 0.110ns } } } { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "5.862 ns" { SYSCLK SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[5] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.862 ns" { SYSCLK SYSCLK~combout SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[5] } { 0.000ns 0.000ns 0.117ns 1.078ns 0.826ns 1.073ns } { 0.000ns 1.100ns 0.000ns 0.989ns 0.000ns 0.679ns } } } { "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" "" { Report "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA_cmp.qrpt" Compiler "I2C_ALTERA" "UNKNOWN" "V1" "E:/code/EP2C20/vbuffer1/db/I2C_ALTERA.quartus_db" { Floorplan "E:/code/EP2C20/vbuffer1/" "" "5.863 ns" { SYSCLK SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[0] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "5.863 ns" { SYSCLK SYSCLK~combout SYSCLK~clkctrl Led_run:inst21|Mega_cnt[0] Led_run:inst21|Mega_cnt[0]~clkctrl i2c_cmd:inst|rom_addr[0] } { 0.000ns 0.000ns 0.117ns 1.078ns 0.826ns 1.074ns } { 0.000ns 1.100ns 0.000ns 0.989ns 0.000ns 0.679ns } } }  } 0}