i2c_altera.qsf.bak

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# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		I2C_ALTERA_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name SMART_RECOMPILE OFF
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "01:09:10  AUGUST 10, 2004"
set_global_assignment -name LAST_QUARTUS_VERSION "5.0 SP2"
set_global_assignment -name VERILOG_FILE mask.v
set_global_assignment -name VERILOG_FILE Y2Cb.v
set_global_assignment -name VERILOG_FILE filter.v
set_global_assignment -name MIF_FILE TEST_CNF.mif
set_global_assignment -name VERILOG_FILE rom_sel.v
set_global_assignment -name VERILOG_FILE i2c_cmd_two.v
set_global_assignment -name AHDL_FILE I2C.TDF
set_global_assignment -name BDF_FILE I2C_ALTERA.bdf
set_global_assignment -name VERILOG_FILE clk_div.v
set_global_assignment -name VERILOG_FILE clk_gen.v
set_global_assignment -name VERILOG_FILE gen_sync.v
set_global_assignment -name SIGNALTAP_FILE stp1.stp

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_153 -to SYSCLK
set_location_assignment PIN_41 -to RST
set_location_assignment PIN_227 -to SCL
set_location_assignment PIN_228 -to SDA
set_location_assignment PIN_28 -to PCLK
set_location_assignment PIN_233 -to PDATA[0]
set_location_assignment PIN_234 -to PDATA[1]
set_location_assignment PIN_235 -to PDATA[2]
set_location_assignment PIN_236 -to PDATA[3]
set_location_assignment PIN_237 -to PDATA[4]
set_location_assignment PIN_238 -to PDATA[5]
set_location_assignment PIN_239 -to PDATA[6]
set_location_assignment PIN_240 -to PDATA[7]
set_location_assignment PIN_38 -to ENC_CLK
set_location_assignment PIN_207 -to ENC_DATA[0]
set_location_assignment PIN_208 -to ENC_DATA[1]
set_location_assignment PIN_213 -to ENC_DATA[2]
set_location_assignment PIN_214 -to ENC_DATA[3]
set_location_assignment PIN_215 -to ENC_DATA[4]
set_location_assignment PIN_218 -to ENC_DATA[5]
set_location_assignment PIN_219 -to ENC_DATA[6]
set_location_assignment PIN_222 -to ENC_DATA[7]
set_location_assignment PIN_216 -to SCL_ENC
set_location_assignment PIN_217 -to SDA_ENC
set_location_assignment PIN_5 -to LEDG[0]
set_location_assignment PIN_11 -to LEDG[1]
set_location_assignment PIN_15 -to LEDG[2]
set_location_assignment PIN_16 -to LEDG[3]
set_location_assignment PIN_61 -to addr1ram[0]
set_location_assignment PIN_60 -to addr1ram[1]
set_location_assignment PIN_59 -to addr1ram[2]
set_location_assignment PIN_58 -to addr1ram[3]
set_location_assignment PIN_57 -to addr1ram[4]
set_location_assignment PIN_56 -to addr1ram[5]
set_location_assignment PIN_55 -to addr1ram[6]
set_location_assignment PIN_54 -to addr1ram[7]
set_location_assignment PIN_48 -to addr1ram[8]
set_location_assignment PIN_47 -to addr1ram[9]
set_location_assignment PIN_87 -to addr1ram[10]
set_location_assignment PIN_86 -to addr1ram[11]
set_location_assignment PIN_85 -to addr1ram[12]
set_location_assignment PIN_84 -to addr1ram[13]
set_location_assignment PIN_83 -to addr1ram[14]
set_location_assignment PIN_67 -to addr1ram[15]
set_location_assignment PIN_66 -to addr1ram[16]
set_location_assignment PIN_53 -to addr1ram[17]
set_location_assignment PIN_62 -to ce1ram
set_location_assignment PIN_63 -to data1ram[0]
set_location_assignment PIN_64 -to data1ram[1]
set_location_assignment PIN_65 -to data1ram[2]
set_location_assignment PIN_49 -to data1ram[3]
set_location_assignment PIN_46 -to data1ram[4]
set_location_assignment PIN_45 -to data1ram[5]
set_location_assignment PIN_44 -to data1ram[6]
set_location_assignment PIN_43 -to data1ram[7]
set_location_assignment PIN_82 -to data1ram[8]
set_location_assignment PIN_79 -to data1ram[9]
set_location_assignment PIN_78 -to data1ram[10]
set_location_assignment PIN_77 -to data1ram[11]
set_location_assignment PIN_76 -to data1ram[12]
set_location_assignment PIN_75 -to data1ram[13]
set_location_assignment PIN_74 -to data1ram[14]
set_location_assignment PIN_73 -to data1ram[15]
set_location_assignment PIN_68 -to rd1ram
set_location_assignment PIN_42 -to wr1ram
set_location_assignment PIN_100 -to ce1
set_location_assignment PIN_101 -to rd1
set_location_assignment PIN_99 -to wr1

# Timing Assignments
# ==================
set_global_assignment -name IGNORE_CLOCK_SETTINGS ON

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE PQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY I2C_ALTERA
set_global_assignment -name USER_LIBRARIES "f:\\i2c_altera"
set_global_assignment -name AUTO_ENABLE_SMART_COMPILE on

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C6Q240C8
set_global_assignment -name STRATIX_II_CONFIGURATION_SCHEME "ACTIVE SERIAL"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO PATHS AND MINIMUM TPD PATHS"
set_global_assignment -name OPTIMIZE_FAST_CORNER_TIMING OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA