📄 i2c_altera.map.rpt
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Analysis & Synthesis report for I2C_ALTERA
Tue Dec 05 16:22:02 2006
Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version
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; Table of Contents ;
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1. Legal Notice
2. Analysis & Synthesis Summary
3. Analysis & Synthesis Settings
4. Analysis & Synthesis Source Files Read
5. Analysis & Synthesis Resource Usage Summary
6. Analysis & Synthesis Resource Utilization by Entity
7. Analysis & Synthesis RAM Summary
8. State Machine - |I2C_ALTERA|i2c_cmd:inst|STATE
9. State Machine - |I2C_ALTERA|I2C:inst1|Sx
10. State Machine - |I2C_ALTERA|I2C:inst1|Ss
11. State Machine - |I2C_ALTERA|I2C:inst1|Sy
12. State Machine - |I2C_ALTERA|I2C:inst1|St
13. General Register Statistics
14. Inverted Register Statistics
15. Multiplexer Restructuring Statistics (Restructuring Performed)
16. Parameter Settings for User Entity Instance: I2C:inst1
17. Parameter Settings for User Entity Instance: I2C:inst1|div_by_n:div_by_x
18. Parameter Settings for User Entity Instance: I2C:inst1|div_by_n:div_by_x|lpm_counter:counter
19. Parameter Settings for User Entity Instance: I2C:inst1|div_by_n:div_by_x|lpm_compare:$00002
20. Parameter Settings for User Entity Instance: i2c_cmd:inst
21. Parameter Settings for User Entity Instance: SAA_ROM:inst2|altsyncram:altsyncram_component
22. Parameter Settings for Inferred Entity Instance: sld_signaltap:auto_signaltap_0
23. Parameter Settings for Inferred Entity Instance: sld_hub:sld_hub_inst
24. SignalTap II Logic Analyzer Settings
25. Analysis & Synthesis Equations
26. Analysis & Synthesis Messages
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; Legal Notice ;
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Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
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; Analysis & Synthesis Summary ;
+------------------------------------+-----------------------------------------------+
; Analysis & Synthesis Status ; Successful - Tue Dec 05 16:22:02 2006 ;
; Quartus II Version ; 5.0 Build 171 11/03/2005 SP 2 SJ Full Version ;
; Revision Name ; I2C_ALTERA ;
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