led.map.summary

适用于FPGA初学者,一个流水灯的程序,用VERILOG语言写的.

Flow Status : Successful - Fri Sep 19 13:15:53 2008
Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
Revision Name : led
Top-level Entity Name : led
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Preliminary
Met timing requirements : N/A
Total combinational functions : 7
Total registers : 18
Total pins : 20
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0