led.qsf

适用于FPGA初学者,一个流水灯的程序,用VERILOG语言写的.

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		led_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:27:11  JUNE 28, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VERILOG_FILE "E:\\altera\\71\\quartus\\led.v"
set_global_assignment -name VECTOR_WAVEFORM_FILE led.vwf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_AD12 -to led_out[17]
set_location_assignment PIN_AE12 -to led_out[16]
set_location_assignment PIN_AE13 -to led_out[15]
set_location_assignment PIN_AF13 -to led_out[14]
set_location_assignment PIN_AE15 -to led_out[13]
set_location_assignment PIN_AD15 -to led_out[12]
set_location_assignment PIN_AC14 -to led_out[11]
set_location_assignment PIN_AA13 -to led_out[10]
set_location_assignment PIN_Y13 -to led_out[9]
set_location_assignment PIN_AA14 -to led_out[8]
set_location_assignment PIN_AC21 -to led_out[7]
set_location_assignment PIN_AD21 -to led_out[6]
set_location_assignment PIN_AD23 -to led_out[5]
set_location_assignment PIN_AD22 -to led_out[4]
set_location_assignment PIN_AC22 -to led_out[3]
set_location_assignment PIN_AB21 -to led_out[2]
set_location_assignment PIN_AF23 -to led_out[1]
set_location_assignment PIN_AE23 -to led_out[0]
set_location_assignment PIN_G26 -to reset
set_location_assignment PIN_N2 -to clk_50mhz

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name TOP_LEVEL_ENTITY led

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP2C35F672C6

# -----------------
# start ENTITY(led)


	# ---------------------------
	# start DESIGN_PARTITION(Top)

		# Incremental Compilation Assignments
		# ===================================
		set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
		set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top

	# end DESIGN_PARTITION(Top)
	# -------------------------

# end ENTITY(led)
# ---------------