traffic.tan.qmsg

利用vhdl编写的模拟交通灯的程序

{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "2 " "Warning: Found 2 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "Clock_4Hz " "Info: Detected ripple clock Clock_4Hz as buffer" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 49 -1 0 } } { "g:/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "g:/quartus41/bin/Assignment Editor.qase" 1 { { 0 "Clock_4Hz" } } } }  } 0} { "Info" "ITAN_RIPPLE_CLK" "Clock_1Hz " "Info: Detected ripple clock Clock_1Hz as buffer" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 60 -1 0 } } { "g:/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "g:/quartus41/bin/Assignment Editor.qase" 1 { { 0 "Clock_1Hz" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "Clock register Block_A register q\[13\] 80.68 MHz 12.394 ns Internal " "Info: Clock Clock has Internal fmax of 80.68 MHz between source register Block_A and destination register q\[13\] (period= 12.394 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.415 ns + Longest register register " "Info: + Longest register to register delay is 3.415 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Block_A 1 REG LC_X11_Y8_N3 9 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X11_Y8_N3; Fanout = 9; REG Node = 'Block_A'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "" { Block_A } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 72 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.525 ns) + CELL(0.442 ns) 0.967 ns Mux~1952 2 COMB LC_X11_Y8_N9 15 " "Info: 2: + IC(0.525 ns) + CELL(0.442 ns) = 0.967 ns; Loc. = LC_X11_Y8_N9; Fanout = 15; COMB Node = 'Mux~1952'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "0.967 ns" { Block_A Mux~1952 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.223 ns) + CELL(1.225 ns) 3.415 ns q\[13\] 3 REG LC_X7_Y8_N3 3 " "Info: 3: + IC(1.223 ns) + CELL(1.225 ns) = 3.415 ns; Loc. = LC_X7_Y8_N3; Fanout = 3; REG Node = 'q\[13\]'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "2.448 ns" { Mux~1952 q[13] } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 130 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.667 ns 48.81 % " "Info: Total cell delay = 1.667 ns ( 48.81 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.748 ns 51.19 % " "Info: Total interconnect delay = 1.748 ns ( 51.19 % )" {  } {  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "3.415 ns" { Block_A Mux~1952 q[13] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-8.718 ns - Smallest " "Info: - Smallest clock skew is -8.718 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clock destination 2.881 ns + Shortest register " "Info: + Shortest clock path from clock Clock to destination register is 2.881 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clock 1 CLK PIN_152 23 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 23; CLK Node = 'Clock'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "" { Clock } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.701 ns) + CELL(0.711 ns) 2.881 ns q\[13\] 2 REG LC_X7_Y8_N3 3 " "Info: 2: + IC(0.701 ns) + CELL(0.711 ns) = 2.881 ns; Loc. = LC_X7_Y8_N3; Fanout = 3; REG Node = 'q\[13\]'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "1.412 ns" { Clock q[13] } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 130 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 75.67 % " "Info: Total cell delay = 2.180 ns ( 75.67 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.701 ns 24.33 % " "Info: Total interconnect delay = 0.701 ns ( 24.33 % )" {  } {  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "2.881 ns" { Clock q[13] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clock source 11.599 ns - Longest register " "Info: - Longest clock path from clock Clock to source register is 11.599 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clock 1 CLK PIN_152 23 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 23; CLK Node = 'Clock'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "" { Clock } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.701 ns) + CELL(0.935 ns) 3.105 ns Clock_4Hz 2 REG LC_X8_Y9_N2 17 " "Info: 2: + IC(0.701 ns) + CELL(0.935 ns) = 3.105 ns; Loc. = LC_X8_Y9_N2; Fanout = 17; REG Node = 'Clock_4Hz'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "1.636 ns" { Clock Clock_4Hz } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 49 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.656 ns) + CELL(0.935 ns) 7.696 ns Clock_1Hz 3 REG LC_X8_Y10_N5 20 " "Info: 3: + IC(3.656 ns) + CELL(0.935 ns) = 7.696 ns; Loc. = LC_X8_Y10_N5; Fanout = 20; REG Node = 'Clock_1Hz'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "4.591 ns" { Clock_4Hz Clock_1Hz } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 60 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.192 ns) + CELL(0.711 ns) 11.599 ns Block_A 4 REG LC_X11_Y8_N3 9 " "Info: 4: + IC(3.192 ns) + CELL(0.711 ns) = 11.599 ns; Loc. = LC_X11_Y8_N3; Fanout = 9; REG Node = 'Block_A'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "3.903 ns" { Clock_1Hz Block_A } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 72 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.050 ns 34.92 % " "Info: Total cell delay = 4.050 ns ( 34.92 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.549 ns 65.08 % " "Info: Total interconnect delay = 7.549 ns ( 65.08 % )" {  } {  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "11.599 ns" { Clock Clock_4Hz Clock_1Hz Block_A } "NODE_NAME" } } }  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "2.881 ns" { Clock q[13] } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "11.599 ns" { Clock Clock_4Hz Clock_1Hz Block_A } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 72 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 130 -1 0 } }  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "3.415 ns" { Block_A Mux~1952 q[13] } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "2.881 ns" { Clock q[13] } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "11.599 ns" { Clock Clock_4Hz Clock_1Hz Block_A } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "q\[9\] Reset Clock 8.382 ns register " "Info: tsu for register q\[9\] (data pin = Reset, clock pin = Clock) is 8.382 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.226 ns + Longest pin register " "Info: + Longest pin to register delay is 11.226 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Reset 1 PIN PIN_1 38 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_1; Fanout = 38; PIN Node = 'Reset'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "" { Reset } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(7.371 ns) + CELL(0.590 ns) 9.430 ns q~2087 2 COMB LC_X11_Y8_N5 6 " "Info: 2: + IC(7.371 ns) + CELL(0.590 ns) = 9.430 ns; Loc. = LC_X11_Y8_N5; Fanout = 6; COMB Node = 'q~2087'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "7.961 ns" { Reset q~2087 } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 130 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.736 ns) + CELL(0.292 ns) 10.458 ns q~2096 3 COMB LC_X12_Y8_N6 1 " "Info: 3: + IC(0.736 ns) + CELL(0.292 ns) = 10.458 ns; Loc. = LC_X12_Y8_N6; Fanout = 1; COMB Node = 'q~2096'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "1.028 ns" { q~2087 q~2096 } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 130 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.459 ns) + CELL(0.309 ns) 11.226 ns q\[9\] 4 REG LC_X12_Y8_N5 2 " "Info: 4: + IC(0.459 ns) + CELL(0.309 ns) = 11.226 ns; Loc. = LC_X12_Y8_N5; Fanout = 2; REG Node = 'q\[9\]'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "0.768 ns" { q~2096 q[9] } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 130 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.660 ns 23.69 % " "Info: Total cell delay = 2.660 ns ( 23.69 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "8.566 ns 76.31 % " "Info: Total interconnect delay = 8.566 ns ( 76.31 % )" {  } {  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "11.226 ns" { Reset q~2087 q~2096 q[9] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 130 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clock destination 2.881 ns - Shortest register " "Info: - Shortest clock path from clock Clock to destination register is 2.881 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clock 1 CLK PIN_152 23 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 23; CLK Node = 'Clock'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "" { Clock } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.701 ns) + CELL(0.711 ns) 2.881 ns q\[9\] 2 REG LC_X12_Y8_N5 2 " "Info: 2: + IC(0.701 ns) + CELL(0.711 ns) = 2.881 ns; Loc. = LC_X12_Y8_N5; Fanout = 2; REG Node = 'q\[9\]'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "1.412 ns" { Clock q[9] } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 130 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 75.67 % " "Info: Total cell delay = 2.180 ns ( 75.67 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.701 ns 24.33 % " "Info: Total interconnect delay = 0.701 ns ( 24.33 % )" {  } {  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "2.881 ns" { Clock q[9] } "NODE_NAME" } } }  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "11.226 ns" { Reset q~2087 q~2096 q[9] } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "2.881 ns" { Clock q[9] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "Clock Turn_B_Out Blink 20.821 ns register " "Info: tco from clock Clock to destination pin Turn_B_Out through register Blink is 20.821 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clock source 11.656 ns + Longest register " "Info: + Longest clock path from clock Clock to source register is 11.656 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clock 1 CLK PIN_152 23 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_152; Fanout = 23; CLK Node = 'Clock'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "" { Clock } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.701 ns) + CELL(0.935 ns) 3.105 ns Clock_4Hz 2 REG LC_X8_Y9_N2 17 " "Info: 2: + IC(0.701 ns) + CELL(0.935 ns) = 3.105 ns; Loc. = LC_X8_Y9_N2; Fanout = 17; REG Node = 'Clock_4Hz'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "1.636 ns" { Clock Clock_4Hz } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 49 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.656 ns) + CELL(0.935 ns) 7.696 ns Clock_1Hz 3 REG LC_X8_Y10_N5 20 " "Info: 3: + IC(3.656 ns) + CELL(0.935 ns) = 7.696 ns; Loc. = LC_X8_Y10_N5; Fanout = 20; REG Node = 'Clock_1Hz'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "4.591 ns" { Clock_4Hz Clock_1Hz } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 60 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.249 ns) + CELL(0.711 ns) 11.656 ns Blink 4 REG LC_X22_Y16_N2 13 " "Info: 4: + IC(3.249 ns) + CELL(0.711 ns) = 11.656 ns; Loc. = LC_X22_Y16_N2; Fanout = 13; REG Node = 'Blink'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "3.960 ns" { Clock_1Hz Blink } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 72 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.050 ns 34.75 % " "Info: Total cell delay = 4.050 ns ( 34.75 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.606 ns 65.25 % " "Info: Total interconnect delay = 7.606 ns ( 65.25 % )" {  } {  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "11.656 ns" { Clock Clock_4Hz Clock_1Hz Blink } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 72 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.941 ns + Longest register pin " "Info: + Longest register to pin delay is 8.941 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Blink 1 REG LC_X22_Y16_N2 13 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X22_Y16_N2; Fanout = 13; REG Node = 'Blink'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "" { Blink } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 72 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.625 ns) + CELL(0.590 ns) 4.215 ns Turn_B_Out~0 2 COMB LC_X8_Y9_N3 1 " "Info: 2: + IC(3.625 ns) + CELL(0.590 ns) = 4.215 ns; Loc. = LC_X8_Y9_N3; Fanout = 1; COMB Node = 'Turn_B_Out~0'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "4.215 ns" { Blink Turn_B_Out~0 } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.602 ns) + CELL(2.124 ns) 8.941 ns Turn_B_Out 3 PIN PIN_49 0 " "Info: 3: + IC(2.602 ns) + CELL(2.124 ns) = 8.941 ns; Loc. = PIN_49; Fanout = 0; PIN Node = 'Turn_B_Out'" {  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "4.726 ns" { Turn_B_Out~0 Turn_B_Out } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" "" "" { Text "E:/Documents and Settings/橘子弟弟/桌面/traffic/traffic.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.714 ns 30.35 % " "Info: Total cell delay = 2.714 ns ( 30.35 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.227 ns 69.65 % " "Info: Total interconnect delay = 6.227 ns ( 69.65 % )" {  } {  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "8.941 ns" { Blink Turn_B_Out~0 Turn_B_Out } "NODE_NAME" } } }  } 0}  } { { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "11.656 ns" { Clock Clock_4Hz Clock_1Hz Blink } "NODE_NAME" } } } { "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" "" "" { Report "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic_cmp.qrpt" Compiler "traffic" "UNKNOWN" "V1" "E:/Documents and Settings/橘子弟弟/桌面/traffic/db/traffic.quartus_db" { Floorplan "" "" "8.941 ns" { Blink Turn_B_Out~0 Turn_B_Out } "NODE_NAME" } } }  } 0}