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📄 traffic.fit.eqn

📁 利用vhdl编写的模拟交通灯的程序
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--Strait_A is Strait_A at LC_X11_Y8_N1
--operation mode is normal

Strait_A_lut_out = Reset # !State[0] & !State[1];
Strait_A = DFFEA(Strait_A_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--Clock_4Hz is Clock_4Hz at LC_X8_Y9_N2
--operation mode is normal

Clock_4Hz_lut_out = !Clock_4Hz;
Clock_4Hz = DFFEA(Clock_4Hz_lut_out, GLOBAL(Clock), VCC, , A1L39, , );


--Blink is Blink at LC_X22_Y16_N2
--operation mode is normal

Blink_lut_out = Reset # Count_Down[2] # Count_Down[1] & Count_Down[0];
Blink = DFFEA(Blink_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L521 is Strait_A_Out~1 at LC_X9_Y7_N4
--operation mode is normal

A1L521 = Strait_A & (Clock_4Hz # Blink);


--Block_A is Block_A at LC_X11_Y8_N3
--operation mode is normal

Block_A_lut_out = State[0] # Reset;
Block_A = DFFEA(Block_A_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L5 is Block_A_Out~0 at LC_X9_Y8_N7
--operation mode is normal

A1L5 = Block_A & (Clock_4Hz # Blink);


--Turn_A is Turn_A at LC_X11_Y8_N4
--operation mode is normal

Turn_A_lut_out = Reset # !State[0] & State[1];
Turn_A = DFFEA(Turn_A_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L131 is Turn_A_Out~0 at LC_X8_Y7_N2
--operation mode is normal

A1L131 = Turn_A & (Clock_4Hz # Blink);


--Strait_B is Strait_B at LC_X11_Y9_N8
--operation mode is normal

Strait_B_lut_out = Reset # State[1] & State[0];
Strait_B = DFFEA(Strait_B_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L821 is Strait_B_Out~0 at LC_X9_Y9_N3
--operation mode is normal

A1L821 = Strait_B & (Clock_4Hz # Blink);


--Block_B is Block_B at LC_X11_Y9_N6
--operation mode is normal

Block_B_lut_out = Reset # !State[0];
Block_B = DFFEA(Block_B_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L8 is Block_B_Out~0 at LC_X9_Y9_N4
--operation mode is normal

A1L8 = Block_B & (Clock_4Hz # Blink);


--Turn_B is Turn_B at LC_X11_Y9_N4
--operation mode is normal

Turn_B_lut_out = Reset # !State[1] & State[0];
Turn_B = DFFEA(Turn_B_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L431 is Turn_B_Out~0 at LC_X8_Y9_N3
--operation mode is normal

A1L431 = Turn_B & (Blink # Clock_4Hz);


--A1L93Q is Count_Down_LCD[6]~reg0 at LC_X32_Y19_N5
--operation mode is normal

A1L93Q_lut_out = Count_Down[0] # Reset # Count_Down[2] $ Count_Down[1];
A1L93Q = DFFEA(A1L93Q_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L73Q is Count_Down_LCD[5]~reg0 at LC_X32_Y19_N9
--operation mode is normal

A1L73Q_lut_out = Reset # Count_Down[1] & Count_Down[0] # !Count_Down[1] & Count_Down[2];
A1L73Q = DFFEA(A1L73Q_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L53Q is Count_Down_LCD[4]~reg0 at LC_X32_Y19_N2
--operation mode is normal

A1L53Q_lut_out = Reset # Count_Down[0] & (Count_Down[2] # !Count_Down[1]);
A1L53Q = DFFEA(A1L53Q_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L33Q is Count_Down_LCD[3]~reg0 at LC_X32_Y19_N8
--operation mode is normal

A1L33Q_lut_out = Reset # Count_Down[0] & (Count_Down[2] # !Count_Down[1]) # !Count_Down[0] & (Count_Down[2] $ Count_Down[1]);
A1L33Q = DFFEA(A1L33Q_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L13Q is Count_Down_LCD[2]~reg0 at LC_X32_Y19_N7
--operation mode is normal

A1L13Q_lut_out = Reset # Count_Down[2] # Count_Down[1] # !Count_Down[0];
A1L13Q = DFFEA(A1L13Q_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L92Q is Count_Down_LCD[1]~reg0 at LC_X32_Y19_N4
--operation mode is normal

A1L92Q_lut_out = Count_Down[1] # Reset # !Count_Down[2];
A1L92Q = DFFEA(A1L92Q_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--A1L72Q is Count_Down_LCD[0]~reg0 at LC_X32_Y19_N6
--operation mode is normal

A1L72Q_lut_out = Count_Down[2] # Reset # Count_Down[0] $ Count_Down[1];
A1L72Q = DFFEA(A1L72Q_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--q[13] is q[13] at LC_X7_Y8_N3
--operation mode is normal

q[13]_lut_out = Count[2] & A1L24 # !Count[2] & !A1L14;
q[13]_sload_eqn = (A1L15 & q[13]) # (!A1L15 & q[13]_lut_out);
q[13]_reg_input = q[13]_sload_eqn & !Reset;
q[13] = DFFEA(q[13]_reg_input, GLOBAL(Clock), VCC, , , , );


--q[12] is q[12] at LC_X12_Y8_N0
--operation mode is normal

q[12]_lut_out = A1L08 # !Reset & q[12] & A1L18;
q[12] = DFFEA(q[12]_lut_out, GLOBAL(Clock), VCC, , , , );


--q[11] is q[11] at LC_X7_Y8_N2
--operation mode is normal

q[11]_lut_out = A1L38 # !Count[2] & A1L28 & A1L97;
q[11] = DFFEA(q[11]_lut_out, GLOBAL(Clock), VCC, , , , );


--q[10] is q[10] at LC_X8_Y8_N0
--operation mode is normal

q[10]_lut_out = A1L48 # !Count[2] & A1L1 & A1L97;
q[10] = DFFEA(q[10]_lut_out, GLOBAL(Clock), VCC, , , , );


--q[9] is q[9] at LC_X12_Y8_N5
--operation mode is normal

q[9]_lut_out = A1L58 # !Reset & q[9] & A1L68;
q[9] = DFFEA(q[9]_lut_out, GLOBAL(Clock), VCC, , , , );


--q[8] is q[8] at LC_X7_Y8_N8
--operation mode is normal

q[8]_lut_out = A1L78 # !Reset & q[8] & A1L88;
q[8] = DFFEA(q[8]_lut_out, GLOBAL(Clock), VCC, , , , );


--q[7] is q[7] at LC_X8_Y8_N6
--operation mode is normal

q[7]_lut_out = A1L98 # A1L25 & !Count[0] & A1L97;
q[7] = DFFEA(q[7]_lut_out, GLOBAL(Clock), VCC, , , , );


--q[6] is q[6] at LC_X11_Y8_N2
--operation mode is normal

q[6]_lut_out = A1L34 & (Strait_A # A1L45) # !A1L34 & !Strait_A & A1L45;
q[6]_sload_eqn = (A1L15 & q[6]) # (!A1L15 & q[6]_lut_out);
q[6]_reg_input = q[6]_sload_eqn & !Reset;
q[6] = DFFEA(q[6]_reg_input, GLOBAL(Clock), VCC, , , , );


--A1L311 is Road_sign~0 at LC_X9_Y7_N9
--operation mode is normal

A1L311 = !q[6] & (Clock_4Hz # Blink);


--q[5] is q[5] at LC_X11_Y8_N8
--operation mode is normal

q[5]_lut_out = A1L75 & (Strait_A # A1L65) # !A1L75 & !Strait_A & A1L65;
q[5]_sload_eqn = (A1L15 & q[5]) # (!A1L15 & q[5]_lut_out);
q[5]_reg_input = q[5]_sload_eqn & !Reset;
q[5] = DFFEA(q[5]_reg_input, GLOBAL(Clock), VCC, , , , );


--A1L411 is Road_sign~1 at LC_X9_Y7_N8
--operation mode is normal

A1L411 = !q[5] & (Clock_4Hz # Blink);


--q[4] is q[4] at LC_X11_Y8_N0
--operation mode is normal

q[4]_lut_out = A1L44 & (Strait_A # A1L84) # !A1L44 & !Strait_A & A1L84;
q[4]_sload_eqn = (A1L15 & q[4]) # (!A1L15 & q[4]_lut_out);
q[4]_reg_input = q[4]_sload_eqn & !Reset;
q[4] = DFFEA(q[4]_reg_input, GLOBAL(Clock), VCC, , , , );


--A1L511 is Road_sign~2 at LC_X9_Y7_N7
--operation mode is normal

A1L511 = !q[4] & (Clock_4Hz # Blink);


--q[3] is q[3] at LC_X8_Y8_N4
--operation mode is normal

q[3]_lut_out = A1L19 # !Reset & !A1L15 & A1L29;
q[3] = DFFEA(q[3]_lut_out, GLOBAL(Clock), VCC, , , , );


--A1L611 is Road_sign~3 at LC_X8_Y8_N7
--operation mode is normal

A1L611 = !q[3] & (Blink # Clock_4Hz);


--q[2] is q[2] at LC_X9_Y8_N3
--operation mode is normal

q[2]_lut_out = A1L54 & (Strait_A # A1L95) # !A1L54 & !Strait_A & A1L95;
q[2]_sload_eqn = (A1L15 & q[2]) # (!A1L15 & q[2]_lut_out);
q[2]_reg_input = q[2]_sload_eqn & !Reset;
q[2] = DFFEA(q[2]_reg_input, GLOBAL(Clock), VCC, , , , );


--A1L711 is Road_sign~4 at LC_X9_Y7_N6
--operation mode is normal

A1L711 = !q[2] & (Clock_4Hz # Blink);


--q[1] is q[1] at LC_X9_Y8_N6
--operation mode is normal

q[1]_lut_out = A1L64 & (Strait_A # A1L16) # !A1L64 & !Strait_A & A1L16;
q[1]_sload_eqn = (A1L15 & q[1]) # (!A1L15 & q[1]_lut_out);
q[1]_reg_input = q[1]_sload_eqn & !Reset;
q[1] = DFFEA(q[1]_reg_input, GLOBAL(Clock), VCC, , , , );


--A1L811 is Road_sign~5 at LC_X9_Y7_N2
--operation mode is normal

A1L811 = !q[1] & (Clock_4Hz # Blink);


--q[0] is q[0] at LC_X12_Y8_N9
--operation mode is normal

q[0]_lut_out = A1L74 & (Strait_A # A1L36) # !A1L74 & !Strait_A & A1L36;
q[0]_sload_eqn = (A1L15 & q[0]) # (!A1L15 & q[0]_lut_out);
q[0]_reg_input = q[0]_sload_eqn & !Reset;
q[0] = DFFEA(q[0]_reg_input, GLOBAL(Clock), VCC, , , , );


--A1L911 is Road_sign~6 at LC_X9_Y7_N5
--operation mode is normal

A1L911 = !q[0] & (Clock_4Hz # Blink);


--State[0] is State[0] at LC_X11_Y9_N2
--operation mode is normal

State[0]_lut_out = !Reset & (State[0] $ !A1L59);
State[0] = DFFEA(State[0]_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--State[1] is State[1] at LC_X11_Y9_N5
--operation mode is normal

State[1]_lut_out = !Reset & (State[1] $ (State[0] & !A1L59));
State[1] = DFFEA(State[1]_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--Clock_1Hz is Clock_1Hz at LC_X8_Y10_N5
--operation mode is normal

Clock_1Hz_lut_out = !Clock_1Hz;
Clock_1Hz = DFFEA(Clock_1Hz_lut_out, GLOBAL(Clock_4Hz), VCC, , A1L49, , );


--C1_safe_q[4] is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[4] at LC_X8_Y9_N9
--operation mode is normal

C1_safe_q[4]_lut_out = C1_safe_q[4] $ !C1L12;
C1_safe_q[4] = DFFEA(C1_safe_q[4]_lut_out, GLOBAL(Clock), VCC, , , , );


--C1_safe_q[2] is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[2] at LC_X8_Y9_N7
--operation mode is arithmetic

C1_safe_q[2]_lut_out = C1_safe_q[2] $ !C1L51;
C1_safe_q[2] = DFFEA(C1_safe_q[2]_lut_out, GLOBAL(Clock), VCC, , , , );

--C1L81 is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[2]~COUT0 at LC_X8_Y9_N7
--operation mode is arithmetic

C1L81_cout_0 = !C1_safe_q[2] & !C1L51;
C1L81 = CARRY(C1L81_cout_0);

--C1L91 is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[2]~COUT1 at LC_X8_Y9_N7
--operation mode is arithmetic

C1L91_cout_1 = !C1_safe_q[2] & !C1L61;
C1L91 = CARRY(C1L91_cout_1);


--C1_safe_q[3] is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[3] at LC_X8_Y9_N8
--operation mode is arithmetic

C1_safe_q[3]_lut_out = C1_safe_q[3] $ C1L81;
C1_safe_q[3] = DFFEA(C1_safe_q[3]_lut_out, GLOBAL(Clock), VCC, , , , );

--C1L12 is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[3]~COUT0 at LC_X8_Y9_N8
--operation mode is arithmetic

C1L12_cout_0 = C1_safe_q[3] # !C1L81;
C1L12 = CARRY(C1L12_cout_0);

--C1L22 is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[3]~COUT1 at LC_X8_Y9_N8
--operation mode is arithmetic

C1L22_cout_1 = C1_safe_q[3] # !C1L91;
C1L22 = CARRY(C1L22_cout_1);


--C1_safe_q[0] is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[0] at LC_X8_Y9_N5
--operation mode is arithmetic

C1_safe_q[0]_lut_out = !C1_safe_q[0];
C1_safe_q[0] = DFFEA(C1_safe_q[0]_lut_out, GLOBAL(Clock), VCC, , , , );

--C1L21 is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[0]~COUT0 at LC_X8_Y9_N5
--operation mode is arithmetic

C1L21_cout_0 = !C1_safe_q[0];
C1L21 = CARRY(C1L21_cout_0);

--C1L31 is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[0]~COUT1 at LC_X8_Y9_N5
--operation mode is arithmetic

C1L31_cout_1 = !C1_safe_q[0];
C1L31 = CARRY(C1L31_cout_1);


--C1_safe_q[1] is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[1] at LC_X8_Y9_N6
--operation mode is arithmetic

C1_safe_q[1]_lut_out = C1_safe_q[1] $ C1L21;
C1_safe_q[1] = DFFEA(C1_safe_q[1]_lut_out, GLOBAL(Clock), VCC, , , , );

--C1L51 is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[1]~COUT0 at LC_X8_Y9_N6
--operation mode is arithmetic

C1L51_cout_0 = C1_safe_q[1] # !C1L21;
C1L51 = CARRY(C1L51_cout_0);

--C1L61 is lpm_counter:Count_4Hz_rtl_0|cntr_037:auto_generated|safe_q[1]~COUT1 at LC_X8_Y9_N6
--operation mode is arithmetic

C1L61_cout_1 = C1_safe_q[1] # !C1L31;
C1L61 = CARRY(C1L61_cout_1);


--A1L69 is reduce_nor~36 at LC_X8_Y9_N1
--operation mode is normal

A1L69 = C1_safe_q[1] # C1_safe_q[0];


--A1L39 is reduce_nor~0 at LC_X8_Y9_N4
--operation mode is normal

A1L39 = !C1_safe_q[4] & !C1_safe_q[3] & !C1_safe_q[2] & !A1L69;


--Count_Down[2] is Count_Down[2] at LC_X24_Y17_N2
--operation mode is normal

Count_Down[2]_lut_out = !Reset & (Count_Down[2] $ (!Count_Down[0] & !Count_Down[1]));
Count_Down[2] = DFFEA(Count_Down[2]_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--Count_Down[1] is Count_Down[1] at LC_X24_Y18_N2
--operation mode is normal

Count_Down[1]_lut_out = !Reset & (Count_Down[0] $ !Count_Down[1]);
Count_Down[1] = DFFEA(Count_Down[1]_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--Count_Down[0] is Count_Down[0] at LC_X22_Y17_N2
--operation mode is normal

Count_Down[0]_lut_out = !Count_Down[0] & !Reset;
Count_Down[0] = DFFEA(Count_Down[0]_lut_out, GLOBAL(Clock_1Hz), VCC, , , , );


--Count[1] is Count[1] at LC_X10_Y8_N0
--operation mode is normal

Count[1]_lut_out = !Count[1];
Count[1] = DFFEA(Count[1]_lut_out, GLOBAL(Clock), VCC, , A1L51, , );


--Count[0] is Count[0] at LC_X10_Y8_N2
--operation mode is normal

Count[0]_lut_out = !Count[0];
Count[0] = DFFEA(Count[0]_lut_out, GLOBAL(Clock), VCC, , !Reset, , );


--A1L14 is Mux~219 at LC_X7_Y8_N5
--operation mode is normal

A1L14 = Count[0] # Count[1];

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