shopping.map.eqn

利用vhdl编写的商店的模型程序

--item[1] is item[1]
--operation mode is normal

item[1]_lut_out = !item[1];
item[1] = DFFEA(item[1]_lut_out, clk, VCC, , A1L76, , );


--item[0] is item[0]
--operation mode is normal

item[0]_lut_out = !item[0];
item[0] = DFFEA(item[0]_lut_out, clk, VCC, , A1L86, , );


--A1L17 is Mux~45
--operation mode is normal

A1L17 = item[1] # item[0];


--A1L27 is Mux~47
--operation mode is normal

A1L27 = item[0] & !item[1];


--A1L37 is Mux~49
--operation mode is normal

A1L37 = item[1] & !item[0];


--A1L47 is Mux~51
--operation mode is normal

A1L47 = item[1] & item[0];


--A1L51Q is act[3]~reg0
--operation mode is normal

A1L51Q_lut_out = !item[1] & !item[0] & get;
A1L51Q = DFFEA(A1L51Q_lut_out, clk, !set, , A1L41, , );


--A1L21Q is act[2]~reg0
--operation mode is normal

A1L21Q_lut_out = item[0] & get & !item[1];
A1L21Q = DFFEA(A1L21Q_lut_out, clk, !set, , A1L41, , );


--A1L01Q is act[1]~reg0
--operation mode is normal

A1L01Q_lut_out = item[1] & get & !item[0];
A1L01Q = DFFEA(A1L01Q_lut_out, clk, !set, , A1L41, , );


--A1L8Q is act[0]~reg0
--operation mode is normal

A1L8Q_lut_out = item[1] & item[0] & get;
A1L8Q = DFFEA(A1L8Q_lut_out, clk, !set, , A1L41, , );


--A1L6Q is act10~reg0
--operation mode is normal

A1L6Q_lut_out = finish & !get & A1L111 & !A1L96;
A1L6Q = DFFEA(A1L6Q_lut_out, clk, VCC, , !set, , );


--A1L3Q is act5~reg0
--operation mode is normal

A1L3Q_lut_out = coin[0] & A1L111 & A1L96 & A1L5;
A1L3Q = DFFEA(A1L3Q_lut_out, clk, VCC, , !set, , );


--A1L86 is item[1]~50
--operation mode is normal

A1L86 = sel & !coin1 & !coin0 & !set;


--A1L76 is item[1]~2
--operation mode is normal

A1L76 = item[0] & A1L86;


--A1L111 is ram[0][3]~1343
--operation mode is normal

A1L111 = !coin1 & !sel & !coin0;


--A1L02 is act~333
--operation mode is normal

A1L02 = !get & !finish;


--C1_safe_q[3] is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[3]
--operation mode is normal

C1_safe_q[3]_carry_eqn = C1L6;
C1_safe_q[3]_lut_out = C1_safe_q[3] $ C1_safe_q[3]_carry_eqn;
C1_safe_q[3]_sload_eqn = (!get & A1L28) # (get & C1_safe_q[3]_lut_out);
C1_safe_q[3] = DFFEA(C1_safe_q[3]_sload_eqn, clk, VCC, , A1L99, , );


--C1_safe_q[2] is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[2]
--operation mode is arithmetic

C1_safe_q[2]_carry_eqn = C1L4;
C1_safe_q[2]_lut_out = C1_safe_q[2] $ !C1_safe_q[2]_carry_eqn;
C1_safe_q[2]_sload_eqn = (!get & A1L08) # (get & C1_safe_q[2]_lut_out);
C1_safe_q[2] = DFFEA(C1_safe_q[2]_sload_eqn, clk, VCC, , A1L99, , );

--C1L6 is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

C1L6 = CARRY(!C1_safe_q[2] & !C1L4);


--C1_safe_q[0] is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[0]
--operation mode is arithmetic

C1_safe_q[0]_lut_out = !C1_safe_q[0];
C1_safe_q[0]_sload_eqn = (!get & A1L67) # (get & C1_safe_q[0]_lut_out);
C1_safe_q[0] = DFFEA(C1_safe_q[0]_sload_eqn, clk, VCC, , A1L99, , );

--C1L2 is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

C1L2 = CARRY(!C1_safe_q[0]);


--C1_safe_q[1] is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[1]
--operation mode is arithmetic

C1_safe_q[1]_carry_eqn = C1L2;
C1_safe_q[1]_lut_out = C1_safe_q[1] $ C1_safe_q[1]_carry_eqn;
C1_safe_q[1]_sload_eqn = (!get & A1L87) # (get & C1_safe_q[1]_lut_out);
C1_safe_q[1] = DFFEA(C1_safe_q[1]_sload_eqn, clk, VCC, , A1L99, , );

--C1L4 is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

C1L4 = CARRY(C1_safe_q[1] # !C1L2);


--A1L89 is process1~22
--operation mode is normal

A1L89 = C1_safe_q[3] # C1_safe_q[2] # C1_safe_q[0] # C1_safe_q[1];


--coin[3] is coin[3]
--operation mode is normal

coin[3]_lut_out = A1L93 & A1L25 & !coin1 # !A1L93 & (A1L25 # coin1);
coin[3]_sload_eqn = (coin0 & A1L04) # (!coin0 & coin[3]_lut_out);
coin[3] = DFFEA(coin[3]_sload_eqn, clk, VCC, , !set, , );


--pri[3] is pri[3]
--operation mode is normal

pri[3]_lut_out = A1L38 & (ram[3][7] # !item[0]) # !A1L38 & ram[1][7] & item[0];
pri[3] = DFFEA(pri[3]_lut_out, clk, VCC, , A1L29, , );


--pri[2] is pri[2]
--operation mode is normal

pri[2]_lut_out = A1L48 & (ram[3][6] # !item[1]) # !A1L48 & ram[2][6] & item[1];
pri[2] = DFFEA(pri[2]_lut_out, clk, VCC, , A1L29, , );


--coin[2] is coin[2]
--operation mode is normal

coin[2]_lut_out = A1L14 & (A1L84 # coin1) # !A1L14 & A1L84 & !coin1;
coin[2]_sload_eqn = (coin0 & A1L24) # (!coin0 & coin[2]_lut_out);
coin[2] = DFFEA(coin[2]_sload_eqn, clk, VCC, , !set, , );


--pri[1] is pri[1]
--operation mode is normal

pri[1]_lut_out = A1L58 & (ram[3][5] # !item[0]) # !A1L58 & ram[1][5] & item[0];
pri[1] = DFFEA(pri[1]_lut_out, clk, VCC, , A1L29, , );


--coin[1] is coin[1]
--operation mode is normal

coin[1]_lut_out = A1L34 & A1L74 & !coin1 # !A1L34 & (A1L74 # coin1);
coin[1]_sload_eqn = (coin0 & A1L44) # (!coin0 & coin[1]_lut_out);
coin[1] = DFFEA(coin[1]_sload_eqn, clk, VCC, , !set, , );


--pri[0] is pri[0]
--operation mode is normal

pri[0]_lut_out = A1L68 & (ram[3][4] # !item[1]) # !A1L68 & ram[2][4] & item[1];
pri[0] = DFFEA(pri[0]_lut_out, clk, VCC, , A1L29, , );


--coin[0] is coin[0]
--operation mode is normal

coin[0]_lut_out = coin[0] & (A1L65 # !A1L05) # !coin[0] & A1L65 & A1L05;
coin[0]_sload_eqn = (coin0 & A1L54) # (!coin0 & coin[0]_lut_out);
coin[0] = DFFEA(coin[0]_sload_eqn, clk, VCC, , !set, , );


--A1L61 is act~320
--operation mode is normal

A1L61 = pri[1] & (pri[0] & !coin[0] # !coin[1]) # !pri[1] & !coin[1] & pri[0] & !coin[0];


--A1L71 is act~321
--operation mode is normal

A1L71 = pri[2] & (A1L61 # !coin[2]) # !pri[2] & !coin[2] & A1L61;


--A1L81 is act~322
--operation mode is normal

A1L81 = coin[3] & pri[3] & A1L71 # !coin[3] & (pri[3] # A1L71);


--A1L91 is act~323
--operation mode is normal

A1L91 = get & A1L89 & !A1L81;


--A1L542 is y2[7]~0
--operation mode is normal

A1L542 = pri[1] & pri[3] # !pri[1] & (pri[2] $ (pri[0] & !pri[3]));


--D1_safe_q[9] is lpm_counter:t_rtl_1|cntr_pt6:auto_generated|safe_q[9]
--operation mode is normal

D1_safe_q[9]_carry_eqn = D1L81;
D1_safe_q[9]_lut_out = D1_safe_q[9] $ D1_safe_q[9]_carry_eqn;
D1_safe_q[9] = DFFEA(D1_safe_q[9]_lut_out, clk, VCC, , , , );


--D1_safe_q[8] is lpm_counter:t_rtl_1|cntr_pt6:auto_generated|safe_q[8]
--operation mode is arithmetic

D1_safe_q[8]_carry_eqn = D1L61;
D1_safe_q[8]_lut_out = D1_safe_q[8] $ !D1_safe_q[8]_carry_eqn;
D1_safe_q[8] = DFFEA(D1_safe_q[8]_lut_out, clk, VCC, , , , );

--D1L81 is lpm_counter:t_rtl_1|cntr_pt6:auto_generated|counter_cella8~COUT
--operation mode is arithmetic

D1L81 = CARRY(D1_safe_q[8] & !D1L61);


--A1L832 is y1[7]~0
--operation mode is normal

A1L832 = C1_safe_q[1] & C1_safe_q[3] # !C1_safe_q[1] & (C1_safe_q[2] $ (C1_safe_q[0] & !C1_safe_q[3]));


--A1L132 is y0[7]~0
--operation mode is normal

A1L132 = coin[1] & coin[3] # !coin[1] & (coin[2] $ (coin[0] & !coin[3]));


--A1L502 is Seg7[7]$latch~107
--operation mode is normal

A1L502 = D1_safe_q[8] & (A1L832 # D1_safe_q[9]) # !D1_safe_q[8] & !D1_safe_q[9] & A1L132;


--A1L702 is Seg7[7]$latch~109
--operation mode is normal

A1L702 = LCELL(A1L502 & !A1L542 & D1_safe_q[9] # !A1L502 & (A1L702 # !D1_safe_q[9]));


--A1L442 is y2[6]~2
--operation mode is normal

A1L442 = pri[2] & (pri[3] # pri[0] $ pri[1]) # !pri[2] & pri[1] & pri[3];


--A1L732 is y1[6]~2
--operation mode is normal

A1L732 = C1_safe_q[2] & (C1_safe_q[3] # C1_safe_q[0] $ C1_safe_q[1]) # !C1_safe_q[2] & C1_safe_q[1] & C1_safe_q[3];


--A1L032 is y0[6]~2
--operation mode is normal

A1L032 = coin[2] & (coin[3] # coin[0] $ coin[1]) # !coin[2] & coin[1] & coin[3];


--A1L102 is Seg7[6]$latch~102
--operation mode is normal

A1L102 = D1_safe_q[8] & (A1L732 # D1_safe_q[9]) # !D1_safe_q[8] & !D1_safe_q[9] & A1L032;


--A1L302 is Seg7[6]$latch~104
--operation mode is normal

A1L302 = LCELL(A1L102 & !A1L442 & D1_safe_q[9] # !A1L102 & (A1L302 # !D1_safe_q[9]));


--A1L342 is y2[5]~4
--operation mode is normal

A1L342 = pri[1] & (pri[3] # !pri[0] & !pri[2]) # !pri[1] & pri[2] & pri[3];


--A1L632 is y1[5]~4
--operation mode is normal

A1L632 = C1_safe_q[1] & (C1_safe_q[3] # !C1_safe_q[0] & !C1_safe_q[2]) # !C1_safe_q[1] & C1_safe_q[2] & C1_safe_q[3];


--A1L922 is y0[5]~4
--operation mode is normal

A1L922 = coin[1] & (coin[3] # !coin[0] & !coin[2]) # !coin[1] & coin[2] & coin[3];


--A1L791 is Seg7[5]$latch~102
--operation mode is normal

A1L791 = D1_safe_q[8] & (A1L632 # D1_safe_q[9]) # !D1_safe_q[8] & !D1_safe_q[9] & A1L922;


--A1L991 is Seg7[5]$latch~104
--operation mode is normal

A1L991 = LCELL(A1L791 & !A1L342 & D1_safe_q[9] # !A1L791 & (A1L991 # !D1_safe_q[9]));


--A1L242 is y2[4]~6
--operation mode is normal

A1L242 = pri[1] & (pri[3] # pri[0] & pri[2]) # !pri[1] & (pri[2] $ (pri[0] & !pri[3]));


--A1L532 is y1[4]~6
--operation mode is normal

A1L532 = C1_safe_q[1] & (C1_safe_q[3] # C1_safe_q[0] & C1_safe_q[2]) # !C1_safe_q[1] & (C1_safe_q[2] $ (C1_safe_q[0] & !C1_safe_q[3]));


--A1L822 is y0[4]~6
--operation mode is normal

A1L822 = coin[1] & (coin[3] # coin[0] & coin[2]) # !coin[1] & (coin[2] $ (coin[0] & !coin[3]));


--A1L391 is Seg7[4]$latch~102
--operation mode is normal

A1L391 = D1_safe_q[8] & (A1L532 # D1_safe_q[9]) # !D1_safe_q[8] & !D1_safe_q[9] & A1L822;


--A1L591 is Seg7[4]$latch~104
--operation mode is normal

A1L591 = LCELL(A1L391 & !A1L242 & D1_safe_q[9] # !A1L391 & (A1L591 # !D1_safe_q[9]));


--A1L142 is y2[3]~8
--operation mode is normal

A1L142 = pri[0] # pri[1] & pri[3] # !pri[1] & pri[2];


--A1L432 is y1[3]~8
--operation mode is normal

A1L432 = C1_safe_q[0] # C1_safe_q[1] & C1_safe_q[3] # !C1_safe_q[1] & C1_safe_q[2];


--A1L722 is y0[3]~8
--operation mode is normal

A1L722 = coin[0] # coin[1] & coin[3] # !coin[1] & coin[2];


--A1L981 is Seg7[3]$latch~102
--operation mode is normal

A1L981 = D1_safe_q[8] & (A1L432 # D1_safe_q[9]) # !D1_safe_q[8] & !D1_safe_q[9] & A1L722;


--A1L191 is Seg7[3]$latch~104
--operation mode is normal

A1L191 = LCELL(A1L981 & !A1L142 & D1_safe_q[9] # !A1L981 & (A1L191 # !D1_safe_q[9]));


--A1L042 is y2[2]~10
--operation mode is normal

A1L042 = pri[0] & (pri[1] # pri[2] $ !pri[3]) # !pri[0] & (pri[2] & pri[3] # !pri[2] & pri[1]);


--A1L332 is y1[2]~10
--operation mode is normal

A1L332 = C1_safe_q[0] & (C1_safe_q[1] # C1_safe_q[2] $ !C1_safe_q[3]) # !C1_safe_q[0] & (C1_safe_q[2] & C1_safe_q[3] # !C1_safe_q[2] & C1_safe_q[1]);


--A1L622 is y0[2]~10
--operation mode is normal

A1L622 = coin[0] & (coin[1] # coin[2] $ !coin[3]) # !coin[0] & (coin[2] & coin[3] # !coin[2] & coin[1]);


--A1L581 is Seg7[2]$latch~102
--operation mode is normal

A1L581 = D1_safe_q[8] & (A1L332 # D1_safe_q[9]) # !D1_safe_q[8] & !D1_safe_q[9] & A1L622;


--A1L781 is Seg7[2]$latch~104
--operation mode is normal

A1L781 = LCELL(A1L581 & !A1L042 & D1_safe_q[9] # !A1L581 & (A1L781 # !D1_safe_q[9]));


--A1L932 is y2[1]~12
--operation mode is normal

A1L932 = pri[1] & !pri[3] & (!pri[2] # !pri[0]) # !pri[1] & (pri[2] $ pri[3]);


--A1L232 is y1[1]~12
--operation mode is normal

A1L232 = C1_safe_q[1] & !C1_safe_q[3] & (!C1_safe_q[2] # !C1_safe_q[0]) # !C1_safe_q[1] & (C1_safe_q[2] $ C1_safe_q[3]);


--A1L522 is y0[1]~12
--operation mode is normal

A1L522 = coin[1] & !coin[3] & (!coin[2] # !coin[0]) # !coin[1] & (coin[2] $ coin[3]);


--A1L181 is Seg7[1]$latch~102
--operation mode is normal

A1L181 = D1_safe_q[8] & (D1_safe_q[9] # !A1L232) # !D1_safe_q[8] & !D1_safe_q[9] & !A1L522;


--A1L381 is Seg7[1]$latch~104
--operation mode is normal

A1L381 = LCELL(A1L181 & A1L932 & D1_safe_q[9] # !A1L181 & (A1L381 # !D1_safe_q[9]));


--A1L612 is Segslt[2]$latch~34
--operation mode is normal

A1L612 = LCELL(!D1_safe_q[8] & (A1L612 # !D1_safe_q[9]));


--A1L312 is Segslt[1]$latch~39
--operation mode is normal

A1L312 = LCELL(A1L312 & (D1_safe_q[8] $ D1_safe_q[9]) # !A1L312 & D1_safe_q[8] & !D1_safe_q[9]);


--A1L012 is Segslt[0]$latch~34
--operation mode is normal

A1L012 = LCELL(D1_safe_q[9] & (D1_safe_q[8] # A1L012));


--A1L5 is act10~38
--operation mode is normal

A1L5 = finish & !get;


--A1L96 is LessThan~418
--operation mode is normal

A1L96 = !coin[1] & !coin[2] & !coin[3];


--ram[2][3] is ram[2][3]
--operation mode is normal

ram[2][3]_lut_out = !A1L32;
ram[2][3] = DFFEA(ram[2][3]_lut_out, clk, VCC, , A1L131, A1L641, set);


--ram[1][3] is ram[1][3]
--operation mode is normal

ram[1][3]_lut_out = !A1L32;
ram[1][3] = DFFEA(ram[1][3]_lut_out, clk, VCC, , A1L121, A1L741, set);


--ram[0][3] is ram[0][3]