shopping.fit.eqn

利用vhdl编写的商店的模型程序

--item[1] is item[1] at LC_X7_Y15_N1
--operation mode is normal

item[1]_lut_out = !item[1];
item[1] = DFFEA(item[1]_lut_out, GLOBAL(clk), VCC, , A1L37, , );


--item[0] is item[0] at LC_X7_Y15_N9
--operation mode is normal

item[0]_lut_out = !item[0];
item[0] = DFFEA(item[0]_lut_out, GLOBAL(clk), VCC, , A1L47, , );


--A1L77 is Mux~45 at LC_X4_Y13_N6
--operation mode is normal

A1L77 = item[1] # item[0];


--A1L87 is Mux~47 at LC_X4_Y13_N5
--operation mode is normal

A1L87 = !item[1] & item[0];


--A1L97 is Mux~49 at LC_X4_Y13_N2
--operation mode is normal

A1L97 = item[1] & !item[0];


--A1L08 is Mux~51 at LC_X4_Y13_N4
--operation mode is normal

A1L08 = item[1] & item[0];


--A1L51Q is act[3]~reg0 at LC_X5_Y14_N6
--operation mode is normal

A1L51Q_lut_out = !item[0] & get & !item[1];
A1L51Q = DFFEA(A1L51Q_lut_out, GLOBAL(clk), !GLOBAL(set), , A1L41, , );


--A1L21Q is act[2]~reg0 at LC_X5_Y14_N1
--operation mode is normal

A1L21Q_lut_out = item[0] & get & !item[1];
A1L21Q = DFFEA(A1L21Q_lut_out, GLOBAL(clk), !GLOBAL(set), , A1L41, , );


--A1L01Q is act[1]~reg0 at LC_X5_Y14_N3
--operation mode is normal

A1L01Q_lut_out = !item[0] & get & item[1];
A1L01Q = DFFEA(A1L01Q_lut_out, GLOBAL(clk), !GLOBAL(set), , A1L41, , );


--A1L8Q is act[0]~reg0 at LC_X5_Y14_N9
--operation mode is normal

A1L8Q_lut_out = item[0] & get & item[1];
A1L8Q = DFFEA(A1L8Q_lut_out, GLOBAL(clk), !GLOBAL(set), , A1L41, , );


--A1L6Q is act10~reg0 at LC_X8_Y14_N2
--operation mode is normal

A1L6Q_lut_out = !A1L57 & !get & finish & A1L711;
A1L6Q = DFFEA(A1L6Q_lut_out, GLOBAL(clk), VCC, , !set, , );


--A1L3Q is act5~reg0 at LC_X8_Y14_N0
--operation mode is normal

A1L3Q_lut_out = A1L711 & A1L5 & A1L57 & coin[0];
A1L3Q = DFFEA(A1L3Q_lut_out, GLOBAL(clk), VCC, , !set, , );


--A1L47 is item[1]~50 at LC_X7_Y15_N3
--operation mode is normal

A1L47 = !coin1 & !coin0 & !set & sel;


--A1L37 is item[1]~2 at LC_X7_Y15_N6
--operation mode is normal

A1L37 = item[0] & A1L47;


--A1L711 is ram[0][3]~1343 at LC_X9_Y15_N2
--operation mode is normal

A1L711 = !coin0 & !sel & !coin1;


--A1L02 is act~333 at LC_X8_Y16_N2
--operation mode is normal

A1L02 = !get & !finish;


--C1_safe_q[3] is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[3] at LC_X8_Y15_N4
--operation mode is normal

C1_safe_q[3]_lut_out = C1_safe_q[3] $ C1L61;
C1_safe_q[3]_sload_eqn = (!get & A1L88) # (get & C1_safe_q[3]_lut_out);
C1_safe_q[3] = DFFEA(C1_safe_q[3]_sload_eqn, GLOBAL(clk), VCC, , A1L501, , );


--C1_safe_q[2] is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[2] at LC_X8_Y15_N3
--operation mode is arithmetic

C1_safe_q[2]_lut_out = C1_safe_q[2] $ !C1L31;
C1_safe_q[2]_sload_eqn = (!get & A1L68) # (get & C1_safe_q[2]_lut_out);
C1_safe_q[2] = DFFEA(C1_safe_q[2]_sload_eqn, GLOBAL(clk), VCC, , A1L501, , );

--C1L61 is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[2]~COUT0 at LC_X8_Y15_N3
--operation mode is arithmetic

C1L61_cout_0 = !C1_safe_q[2] & !C1L31;
C1L61 = CARRY(C1L61_cout_0);

--C1L71 is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[2]~COUT1 at LC_X8_Y15_N3
--operation mode is arithmetic

C1L71_cout_1 = !C1_safe_q[2] & !C1L41;
C1L71 = CARRY(C1L71_cout_1);


--C1_safe_q[0] is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[0] at LC_X8_Y15_N1
--operation mode is arithmetic

C1_safe_q[0]_lut_out = !C1_safe_q[0];
C1_safe_q[0]_sload_eqn = (!get & A1L28) # (get & C1_safe_q[0]_lut_out);
C1_safe_q[0] = DFFEA(C1_safe_q[0]_sload_eqn, GLOBAL(clk), VCC, , A1L501, , );

--C1L01 is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[0]~COUT0 at LC_X8_Y15_N1
--operation mode is arithmetic

C1L01_cout_0 = !C1_safe_q[0];
C1L01 = CARRY(C1L01_cout_0);

--C1L11 is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[0]~COUT1 at LC_X8_Y15_N1
--operation mode is arithmetic

C1L11_cout_1 = !C1_safe_q[0];
C1L11 = CARRY(C1L11_cout_1);


--C1_safe_q[1] is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[1] at LC_X8_Y15_N2
--operation mode is arithmetic

C1_safe_q[1]_lut_out = C1_safe_q[1] $ C1L01;
C1_safe_q[1]_sload_eqn = (!get & A1L48) # (get & C1_safe_q[1]_lut_out);
C1_safe_q[1] = DFFEA(C1_safe_q[1]_sload_eqn, GLOBAL(clk), VCC, , A1L501, , );

--C1L31 is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[1]~COUT0 at LC_X8_Y15_N2
--operation mode is arithmetic

C1L31_cout_0 = C1_safe_q[1] # !C1L01;
C1L31 = CARRY(C1L31_cout_0);

--C1L41 is lpm_counter:quan_rtl_0|cntr_om8:auto_generated|safe_q[1]~COUT1 at LC_X8_Y15_N2
--operation mode is arithmetic

C1L41_cout_1 = C1_safe_q[1] # !C1L11;
C1L41 = CARRY(C1L41_cout_1);


--A1L401 is process1~22 at LC_X8_Y15_N8
--operation mode is normal

A1L401 = C1_safe_q[1] # C1_safe_q[2] # C1_safe_q[3] # C1_safe_q[0];


--coin[3] is coin[3] at LC_X9_Y14_N8
--operation mode is normal

coin[3]_lut_out = coin1 & !A1L54 # !coin1 & A1L85;
coin[3]_sload_eqn = (coin0 & A1L64) # (!coin0 & coin[3]_lut_out);
coin[3] = DFFEA(coin[3]_sload_eqn, GLOBAL(clk), VCC, , !set, , );


--pri[3] is pri[3] at LC_X6_Y14_N6
--operation mode is normal

pri[3]_lut_out = A1L98 & (ram[3][7] # !item[0]) # !A1L98 & item[0] & ram[1][7];
pri[3] = DFFEA(pri[3]_lut_out, GLOBAL(clk), VCC, , A1L89, , );


--pri[2] is pri[2] at LC_X6_Y14_N7
--operation mode is normal

pri[2]_lut_out = A1L09 & (ram[3][6] # !item[1]) # !A1L09 & ram[2][6] & item[1];
pri[2] = DFFEA(pri[2]_lut_out, GLOBAL(clk), VCC, , A1L89, , );


--coin[2] is coin[2] at LC_X10_Y14_N9
--operation mode is normal

coin[2]_lut_out = coin1 & A1L74 # !coin1 & A1L45;
coin[2]_sload_eqn = (coin0 & A1L84) # (!coin0 & coin[2]_lut_out);
coin[2] = DFFEA(coin[2]_sload_eqn, GLOBAL(clk), VCC, , !set, , );


--pri[1] is pri[1] at LC_X11_Y14_N2
--operation mode is normal

pri[1]_lut_out = A1L19 & (ram[3][5] # !item[0]) # !A1L19 & ram[1][5] & item[0];
pri[1] = DFFEA(pri[1]_lut_out, GLOBAL(clk), VCC, , A1L89, , );


--coin[1] is coin[1] at LC_X10_Y14_N5
--operation mode is normal

coin[1]_lut_out = coin1 & !A1L94 # !coin1 & A1L35;
coin[1]_sload_eqn = (coin0 & A1L05) # (!coin0 & coin[1]_lut_out);
coin[1] = DFFEA(coin[1]_sload_eqn, GLOBAL(clk), VCC, , !set, , );


--pri[0] is pri[0] at LC_X6_Y14_N1
--operation mode is normal

pri[0]_lut_out = A1L29 & (ram[3][4] # !item[1]) # !A1L29 & item[1] & ram[2][4];
pri[0] = DFFEA(pri[0]_lut_out, GLOBAL(clk), VCC, , A1L89, , );


--coin[0] is coin[0] at LC_X8_Y14_N3
--operation mode is normal

coin[0]_lut_out = coin[0] & (A1L26 # !A1L65) # !coin[0] & A1L65 & A1L26;
coin[0]_sload_eqn = (coin0 & A1L15) # (!coin0 & coin[0]_lut_out);
coin[0] = DFFEA(coin[0]_sload_eqn, GLOBAL(clk), VCC, , !set, , );


--A1L61 is act~320 at LC_X9_Y14_N2
--operation mode is normal

A1L61 = coin[1] & !coin[0] & pri[0] & pri[1] # !coin[1] & (pri[1] # !coin[0] & pri[0]);


--A1L71 is act~321 at LC_X9_Y14_N3
--operation mode is normal

A1L71 = coin[2] & pri[2] & A1L61 # !coin[2] & (pri[2] # A1L61);


--A1L81 is act~322 at LC_X9_Y14_N4
--operation mode is normal

A1L81 = coin[3] & pri[3] & A1L71 # !coin[3] & (pri[3] # A1L71);


--A1L91 is act~323 at LC_X9_Y14_N5
--operation mode is normal

A1L91 = get & A1L401 & !A1L81;


--A1L152 is y2[7]~0 at LC_X8_Y12_N3
--operation mode is normal

A1L152 = pri[3] & (pri[1] # pri[2]) # !pri[3] & !pri[1] & (pri[2] $ pri[0]);


--D1_safe_q[9] is lpm_counter:t_rtl_1|cntr_pt6:auto_generated|safe_q[9] at LC_X8_Y11_N9
--operation mode is normal

D1_safe_q[9]_carry_eqn = (!D1L01 & D1L44) # (D1L01 & D1L54);
D1_safe_q[9]_lut_out = D1_safe_q[9] $ D1_safe_q[9]_carry_eqn;
D1_safe_q[9] = DFFEA(D1_safe_q[9]_lut_out, GLOBAL(clk), VCC, , , , );


--D1_safe_q[8] is lpm_counter:t_rtl_1|cntr_pt6:auto_generated|safe_q[8] at LC_X8_Y11_N8
--operation mode is arithmetic

D1_safe_q[8]_carry_eqn = (!D1L01 & D1L14) # (D1L01 & D1L24);
D1_safe_q[8]_lut_out = D1_safe_q[8] $ !D1_safe_q[8]_carry_eqn;
D1_safe_q[8] = DFFEA(D1_safe_q[8]_lut_out, GLOBAL(clk), VCC, , , , );

--D1L44 is lpm_counter:t_rtl_1|cntr_pt6:auto_generated|safe_q[8]~COUT0 at LC_X8_Y11_N8
--operation mode is arithmetic

D1L44_cout_0 = D1_safe_q[8] & !D1L14;
D1L44 = CARRY(D1L44_cout_0);

--D1L54 is lpm_counter:t_rtl_1|cntr_pt6:auto_generated|safe_q[8]~COUT1 at LC_X8_Y11_N8
--operation mode is arithmetic

D1L54_cout_1 = D1_safe_q[8] & !D1L24;
D1L54 = CARRY(D1L54_cout_1);


--A1L442 is y1[7]~0 at LC_X8_Y12_N5
--operation mode is normal

A1L442 = C1_safe_q[1] & C1_safe_q[3] # !C1_safe_q[1] & (C1_safe_q[2] $ (C1_safe_q[0] & !C1_safe_q[3]));


--A1L732 is y0[7]~0 at LC_X10_Y12_N8
--operation mode is normal

A1L732 = coin[1] & coin[3] # !coin[1] & (coin[2] $ (coin[0] & !coin[3]));


--A1L112 is Seg7[7]$latch~107 at LC_X8_Y12_N6
--operation mode is normal

A1L112 = D1_safe_q[8] & (D1_safe_q[9] # A1L442) # !D1_safe_q[8] & !D1_safe_q[9] & A1L732;


--A1L312 is Seg7[7]$latch~109 at LC_X8_Y12_N9
--operation mode is normal

A1L312 = LCELL(A1L112 & D1_safe_q[9] & !A1L152 # !A1L112 & (A1L312 # !D1_safe_q[9]));


--A1L052 is y2[6]~2 at LC_X10_Y12_N3
--operation mode is normal

A1L052 = pri[2] & (pri[3] # pri[1] $ pri[0]) # !pri[2] & pri[1] & pri[3];


--A1L342 is y1[6]~2 at LC_X9_Y11_N1
--operation mode is normal

A1L342 = C1_safe_q[3] & (C1_safe_q[1] # C1_safe_q[2]) # !C1_safe_q[3] & C1_safe_q[2] & (C1_safe_q[0] $ C1_safe_q[1]);


--A1L632 is y0[6]~2 at LC_X10_Y12_N2
--operation mode is normal

A1L632 = coin[3] & (coin[1] # coin[2]) # !coin[3] & coin[2] & (coin[0] $ coin[1]);


--A1L702 is Seg7[6]$latch~102 at LC_X9_Y11_N2
--operation mode is normal

A1L702 = D1_safe_q[8] & (A1L342 # D1_safe_q[9]) # !D1_safe_q[8] & !D1_safe_q[9] & A1L632;


--A1L902 is Seg7[6]$latch~104 at LC_X10_Y11_N7
--operation mode is normal

A1L902 = LCELL(A1L702 & D1_safe_q[9] & !A1L052 # !A1L702 & (A1L902 # !D1_safe_q[9]));


--A1L942 is y2[5]~4 at LC_X10_Y13_N2
--operation mode is normal

A1L942 = pri[1] & (pri[3] # !pri[0] & !pri[2]) # !pri[1] & pri[2] & pri[3];


--A1L242 is y1[5]~4 at LC_X9_Y11_N0
--operation mode is normal

A1L242 = C1_safe_q[1] & (C1_safe_q[3] # !C1_safe_q[0] & !C1_safe_q[2]) # !C1_safe_q[1] & C1_safe_q[3] & C1_safe_q[2];


--A1L532 is y0[5]~4 at LC_X10_Y13_N9
--operation mode is normal

A1L532 = coin[1] & (coin[3] # !coin[2] & !coin[0]) # !coin[1] & coin[2] & coin[3];


--A1L302 is Seg7[5]$latch~102 at LC_X9_Y11_N5
--operation mode is normal

A1L302 = D1_safe_q[8] & (D1_safe_q[9] # A1L242) # !D1_safe_q[8] & A1L532 & !D1_safe_q[9];


--A1L502 is Seg7[5]$latch~104 at LC_X9_Y11_N4
--operation mode is normal

A1L502 = LCELL(A1L302 & !A1L942 & D1_safe_q[9] # !A1L302 & (A1L502 # !D1_safe_q[9]));


--A1L842 is y2[4]~6 at LC_X10_Y12_N9
--operation mode is normal

A1L842 = pri[1] & (pri[3] # pri[0] & pri[2]) # !pri[1] & (pri[2] $ (pri[0] & !pri[3]));


--A1L142 is y1[4]~6 at LC_X9_Y11_N3
--operation mode is normal

A1L142 = C1_safe_q[1] & (C1_safe_q[3] # C1_safe_q[0] & C1_safe_q[2]) # !C1_safe_q[1] & (C1_safe_q[2] $ (C1_safe_q[0] & !C1_safe_q[3]));


--A1L432 is y0[4]~6 at LC_X10_Y12_N7
--operation mode is normal

A1L432 = coin[1] & (coin[3] # coin[0] & coin[2]) # !coin[1] & (coin[2] $ (coin[0] & !coin[3]));


--A1L991 is Seg7[4]$latch~102 at LC_X10_Y11_N6
--operation mode is normal

A1L991 = D1_safe_q[8] & (A1L142 # D1_safe_q[9]) # !D1_safe_q[8] & !D1_safe_q[9] & A1L432;


--A1L102 is Seg7[4]$latch~104 at LC_X10_Y11_N4
--operation mode is normal

A1L102 = LCELL(A1L991 & D1_safe_q[9] & !A1L842 # !A1L991 & (A1L102 # !D1_safe_q[9]));


--A1L742 is y2[3]~8 at LC_X9_Y12_N3
--operation mode is normal

A1L742 = pri[0] # pri[1] & pri[3] # !pri[1] & pri[2];


--A1L042 is y1[3]~8 at LC_X9_Y11_N8
--operation mode is normal

A1L042 = C1_safe_q[0] # C1_safe_q[1] & C1_safe_q[3] # !C1_safe_q[1] & C1_safe_q[2];


--A1L332 is y0[3]~8 at LC_X10_Y12_N6
--operation mode is normal

A1L332 = coin[0] # coin[1] & coin[3] # !coin[1] & coin[2];


--A1L591 is Seg7[3]$latch~102 at LC_X9_Y11_N6
--operation mode is normal

A1L591 = D1_safe_q[8] & (D1_safe_q[9] # A1L042) # !D1_safe_q[8] & !D1_safe_q[9] & A1L332;


--A1L791 is Seg7[3]$latch~104 at LC_X9_Y11_N7
--operation mode is normal

A1L791 = LCELL(A1L591 & !A1L742 & D1_safe_q[9] # !A1L591 & (A1L791 # !D1_safe_q[9]));


--A1L642 is y2[2]~10 at LC_X10_Y12_N5
--operation mode is normal

A1L642 = pri[0] & (pri[1] # pri[2] $ !pri[3]) # !pri[0] & (pri[2] & pri[3] # !pri[2] & pri[1]);


--A1L932 is y1[2]~10 at LC_X9_Y15_N4
--operation mode is normal

A1L932 = C1_safe_q[0] & (C1_safe_q[1] # C1_safe_q[2] $ !C1_safe_q[3]) # !C1_safe_q[0] & (C1_safe_q[2] & C1_safe_q[3] # !C1_safe_q[2] & C1_safe_q[1]);


--A1L232 is y0[2]~10 at LC_X10_Y12_N4
--operation mode is normal

A1L232 = coin[0] & (coin[1] # coin[3] $ !coin[2]) # !coin[0] & (coin[2] & coin[3] # !coin[2] & coin[1]);


--A1L191 is Seg7[2]$latch~102 at LC_X10_Y11_N9
--operation mode is normal

A1L191 = D1_safe_q[8] & (D1_safe_q[9] # A1L932) # !D1_safe_q[8] & !D1_safe_q[9] & A1L232;


--A1L391 is Seg7[2]$latch~104 at LC_X10_Y11_N8
--operation mode is normal

A1L391 = LCELL(A1L191 & D1_safe_q[9] & !A1L642 # !A1L191 & (A1L391 # !D1_safe_q[9]));


--A1L542 is y2[1]~12 at LC_X10_Y13_N4
--operation mode is normal

A1L542 = pri[1] & !pri[3] & (!pri[2] # !pri[0]) # !pri[1] & (pri[2] $ pri[3]);


--A1L832 is y1[1]~12 at LC_X9_Y11_N9
--operation mode is normal

A1L832 = C1_safe_q[1] & !C1_safe_q[3] & (!C1_safe_q[2] # !C1_safe_q[0]) # !C1_safe_q[1] & (C1_safe_q[3] $ C1_safe_q[2]);


--A1L132 is y0[1]~12 at LC_X10_Y12_N1
--operation mode is normal

A1L132 = coin[1] & !coin[3] & (!coin[2] # !coin[0]) # !coin[1] & (coin[3] $ coin[2]);


--A1L781 is Seg7[1]$latch~102 at LC_X10_Y11_N1
--operation mode is normal

A1L781 = D1_safe_q[8] & (D1_safe_q[9] # !A1L832) # !D1_safe_q[8] & !A1L132 & !D1_safe_q[9];


--A1L981 is Seg7[1]$latch~104 at LC_X10_Y11_N5
--operation mode is normal

A1L981 = LCELL(A1L781 & A1L542 & D1_safe_q[9] # !A1L781 & (A1L981 # !D1_safe_q[9]));


--A1L222 is Segslt[2]$latch~34 at LC_X10_Y11_N3
--operation mode is normal

A1L222 = LCELL(!D1_safe_q[8] & (A1L222 # !D1_safe_q[9]));


--A1L912 is Segslt[1]$latch~39 at LC_X10_Y10_N2
--operation mode is normal

A1L912 = LCELL(A1L912 & (D1_safe_q[9] $ D1_safe_q[8]) # !A1L912 & !D1_safe_q[9] & D1_safe_q[8]);


--A1L612 is Segslt[0]$latch~34 at LC_X10_Y11_N2
--operation mode is normal

A1L612 = LCELL(D1_safe_q[9] & (A1L612 # D1_safe_q[8]));


--A1L5 is act10~38 at LC_X8_Y15_N6
--operation mode is normal

A1L5 = !get & finish;


--A1L57 is LessThan~418 at LC_X10_Y14_N4
--operation mode is normal

A1L57 = !coin[2] & !coin[3] & !coin[1];


--ram[2][3] is ram[2][3] at LC_X5_Y14_N2
--operation mode is normal

ram[2][3]_lut_out = !A1L32;
ram[2][3] = DFFEA(ram[2][3]_lut_out, GLOBAL(clk), VCC, , A1L731, A1L251, GLOBAL(set));


--ram[1][3] is ram[1][3] at LC_X9_Y12_N2
--operation mode is normal

ram[1][3]_lut_out = !A1L32;
ram[1][3] = DFFEA(ram[1][3]_lut_out, GLOBAL(clk), VCC, , A1L721, A1L351, GLOBAL(set));


--ram[0][3] is ram[0][3] at LC_X7_Y14_N8
--operation mode is normal

ram[0][3]_lut_out = !A1L32;
ram[0][3] = DFFEA(ram[0][3]_lut_out, GLOBAL(clk), VCC, , A1L611, A1L451, GLOBAL(set));