music.map.rpt

这是一个在Quartus II软件中编写的vhdl程序。程序下载后可用蜂鸣器播放音乐

; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 11    ;
; Number of registers using Asynchronous Clear ; 8     ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 0     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                             ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output   ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------+
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; No         ; |music_1|display:inst|num[0] ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; No         ; |music_1|display:inst|led_sb ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------+


+-----------------------------------------------------+
; Source assignments for speaker:inst3                ;
+----------------+-------+------+---------------------+
; Assignment     ; Value ; From ; To                  ;
+----------------+-------+------+---------------------+
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[0]  ;
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[1]  ;
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[2]  ;
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[3]  ;
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[4]  ;
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[5]  ;
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[6]  ;
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[7]  ;
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[8]  ;
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[9]  ;
; POWER_UP_LEVEL ; Low   ; -    ; genspks:count11[10] ;
; POWER_UP_LEVEL ; Low   ; -    ; count4[0]           ;
; POWER_UP_LEVEL ; Low   ; -    ; count4[1]           ;
; POWER_UP_LEVEL ; Low   ; -    ; count4[2]           ;
; POWER_UP_LEVEL ; Low   ; -    ; count4[3]           ;
+----------------+-------+------+---------------------+


+--------------------------------------------+
; Source assignments for music_rom:inst1     ;
+----------------+-------+------+------------+
; Assignment     ; Value ; From ; To         ;
+----------------+-------+------+------------+
; POWER_UP_LEVEL ; Low   ; -    ; adr[0]     ;
; POWER_UP_LEVEL ; Low   ; -    ; adr[1]     ;
; POWER_UP_LEVEL ; Low   ; -    ; adr[2]     ;
; POWER_UP_LEVEL ; Low   ; -    ; adr[3]     ;
; POWER_UP_LEVEL ; Low   ; -    ; adr[4]     ;
; POWER_UP_LEVEL ; Low   ; -    ; adr[5]     ;
; POWER_UP_LEVEL ; Low   ; -    ; adr[6]     ;
; POWER_UP_LEVEL ; Low   ; -    ; adr[7]     ;
; POWER_UP_LEVEL ; Low   ; -    ; clk_cnt[0] ;
; POWER_UP_LEVEL ; Low   ; -    ; clk_cnt[1] ;
; POWER_UP_LEVEL ; Low   ; -    ; clk_cnt[2] ;
; POWER_UP_LEVEL ; Low   ; -    ; clk_cnt[3] ;
; POWER_UP_LEVEL ; Low   ; -    ; clk_cnt[4] ;
; POWER_UP_LEVEL ; Low   ; -    ; clk_cnt[5] ;
; POWER_UP_LEVEL ; Low   ; -    ; clk_cnt[6] ;
; POWER_UP_LEVEL ; Low   ; -    ; clk_cnt[7] ;
; POWER_UP_LEVEL ; Low   ; -    ; clk_cnt[8] ;
+----------------+-------+------+------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Mon Jan 14 09:36:37 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off music -c music
Info: Found 2 design units, including 1 entities, in source file music_rom.vhd
    Info: Found design unit 1: music_rom-bhv
    Info: Found entity 1: music_rom
Info: Found 2 design units, including 1 entities, in source file data_rom.vhd
    Info: Found design unit 1: data_rom-SYN
    Info: Found entity 1: data_rom
Info: Found 2 design units, including 1 entities, in source file tone_rom.vhd
    Info: Found design unit 1: tone_rom_CtoG-one
    Info: Found entity 1: tone_rom_CtoG
Info: Found 2 design units, including 1 entities, in source file display.vhd
    Info: Found design unit 1: display-behav
    Info: Found entity 1: display
Info: Found 2 design units, including 1 entities, in source file speaker.vhd
    Info: Found design unit 1: speaker-one
    Info: Found entity 1: speaker
Info: Found 1 design units, including 1 entities, in source file music_1.bdf
    Info: Found entity 1: music_1
Info: Found 2 design units, including 1 entities, in source file music_rom_stop.vhd
    Info: Found design unit 1: music_rom_stop-bhv
    Info: Found entity 1: music_rom_stop
Info: Found 2 design units, including 1 entities, in source file tone_rom_CtoG.vhd
    Info: Found design unit 1: tone_rom-one
    Info: Found entity 1: tone_rom
Info: Elaborating entity "music_1" for the top level hierarchy
Warning: Port "din2" of type display and instance "inst" is missing source signal
Warning: Port "din3" of type display and instance "inst" is missing source signal
Warning: Port "din4" of type display and instance "inst" is missing source signal
Warning: Port "din5" of type display and instance "inst" is missing source signal
Info: Elaborating entity "speaker" for hierarchy "speaker:inst3"
Info: Elaborating entity "tone_rom" for hierarchy "tone_rom:inst2"
Warning (10492): VHDL Process Statement warning at tone_rom_CtoG.vhd(22): signal "C_G" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning (10492): VHDL Process Statement warning at tone_rom_CtoG.vhd(23): signal "index1" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning (10492): VHDL Process Statement warning at tone_rom_CtoG.vhd(42): signal "C_G" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning (10492): VHDL Process Statement warning at tone_rom_CtoG.vhd(43): signal "index1" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning (10631): VHDL Process Statement warning at tone_rom_CtoG.vhd(20): inferring latch(es) for signal or variable "tone1", which holds its previous value in one or more paths through the process
Warning (10631): VHDL Process Statement warning at tone_rom_CtoG.vhd(20): inferring latch(es) for signal or variable "code1", which holds its previous value in one or more paths through the process
Warning (10631): VHDL Process Statement warning at tone_rom_CtoG.vhd(20): inferring latch(es) for signal or variable "high", which holds its previous value in one or more paths through the process
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "high[0]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "high[1]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "high[2]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "high[3]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "code1[0]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "code1[1]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "code1[2]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "code1[3]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[0]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[1]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[2]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[3]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[4]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[5]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[6]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[7]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[8]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[9]"
Info (10041): Verilog HDL or VHDL info at tone_rom_CtoG.vhd(20): inferred latch for "tone1[10]"
Info: Elaborating entity "music_rom" for hierarchy "music_rom:inst1"
Warning (10492): VHDL Process Statement warning at music_rom.vhd(29): signal "adr" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning (10027): Verilog HDL or VHDL warning at music_rom.vhd(35): index signal is not wide enough to address all bits of range
Warning (10030): Tied undriven net "rom[248][3]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[248][2]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[248][1]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[248][0]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[249][3]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[249][2]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[249][1]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[249][0]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[250][3]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[250][2]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[250][1]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[250][0]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[251][3]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[251][2]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[251][1]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[251][0]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[252][3]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[252][2]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[252][1]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[252][0]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[253][3]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[253][2]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[253][1]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[253][0]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[254][3]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[254][2]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[254][1]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[254][0]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[255][3]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[255][2]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[255][1]" at music_rom.vhd(12) to 0
Warning (10030): Tied undriven net "rom[255][0]" at music_rom.vhd(12) to 0
Info: Elaborating entity "display" for hierarchy "display:inst"
Info: Duplicate registers merged to single register
    Info: Duplicate register "speaker:inst3|spks" merged to single register "speaker:inst3|\delayspks:count2"
Info: Duplicate registers merged to single register
    Info: Duplicate register "music_rom:inst1|clk_cnt[0]" merged to single register "display:inst|s[0]"
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "code[3]" stuck at GND
    Warning: Pin "high[3]" stuck at GND
    Warning: Pin "high[2]" stuck at GND
    Warning: Pin "led[7]" stuck at GND
Info: Implemented 228 device resources after synthesis - the final resource count might be different
    Info: Implemented 3 input pins
    Info: Implemented 31 output pins
    Info: Implemented 194 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 50 warnings
    Info: Processing ended: Mon Jan 14 09:36:44 2008
    Info: Elapsed time: 00:00:07