📄 beep.fit.rpt
字号:
+----------------------------+----------------------+
+---------------------------------------------------------------------------+
; LAB Logic Elements ;
+--------------------------------------------+------------------------------+
; Number of Logic Elements (Average = 8.00) ; Number of LABs (Total = 13) ;
+--------------------------------------------+------------------------------+
; 1 ; 1 ;
; 2 ; 1 ;
; 3 ; 0 ;
; 4 ; 1 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 1 ;
; 9 ; 1 ;
; 10 ; 8 ;
+--------------------------------------------+------------------------------+
+-------------------------------------------------------------------+
; LAB-wide Signals ;
+------------------------------------+------------------------------+
; LAB-wide Signals (Average = 1.23) ; Number of LABs (Total = 13) ;
+------------------------------------+------------------------------+
; 1 Clock ; 8 ;
; 1 Clock enable ; 2 ;
; 1 Sync. clear ; 6 ;
+------------------------------------+------------------------------+
+----------------------------------------------------------------------------+
; LAB Signals Sourced ;
+---------------------------------------------+------------------------------+
; Number of Signals Sourced (Average = 8.00) ; Number of LABs (Total = 13) ;
+---------------------------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 1 ;
; 2 ; 1 ;
; 3 ; 0 ;
; 4 ; 1 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 1 ;
; 9 ; 1 ;
; 10 ; 8 ;
+---------------------------------------------+------------------------------+
+--------------------------------------------------------------------------------+
; LAB Signals Sourced Out ;
+-------------------------------------------------+------------------------------+
; Number of Signals Sourced Out (Average = 4.62) ; Number of LABs (Total = 13) ;
+-------------------------------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 4 ;
; 2 ; 1 ;
; 3 ; 2 ;
; 4 ; 1 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 3 ;
; 9 ; 0 ;
; 10 ; 2 ;
+-------------------------------------------------+------------------------------+
+----------------------------------------------------------------------------+
; LAB Distinct Inputs ;
+---------------------------------------------+------------------------------+
; Number of Distinct Inputs (Average = 8.92) ; Number of LABs (Total = 13) ;
+---------------------------------------------+------------------------------+
; 0 ; 0 ;
; 1 ; 0 ;
; 2 ; 1 ;
; 3 ; 1 ;
; 4 ; 2 ;
; 5 ; 1 ;
; 6 ; 0 ;
; 7 ; 1 ;
; 8 ; 1 ;
; 9 ; 0 ;
; 10 ; 2 ;
; 11 ; 1 ;
; 12 ; 0 ;
; 13 ; 0 ;
; 14 ; 0 ;
; 15 ; 1 ;
; 16 ; 0 ;
; 17 ; 1 ;
; 18 ; 0 ;
; 19 ; 0 ;
; 20 ; 1 ;
+---------------------------------------------+------------------------------+
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Full Version
Info: Processing started: Mon Nov 20 21:22:04 2006
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off beep -c beep
Info: Selected device EPM1270T144C5 for design "beep"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
Info: Device EPM570T144C5 is compatible
Info: Device EPM570T144I5 is compatible
Info: Device EPM1270T144I5 is compatible
Info: Device EPM1270T144C5ES is compatible
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
Info: Assuming a global fmax requirement of 1000 MHz
Info: Assuming a global tsu requirement of 2.0 ns
Info: Assuming a global tco requirement of 1.0 ns
Info: Assuming a global tpd requirement of 1.0 ns
Info: Performing register packing on registers with non-logic cell location assignments
Info: Completed register packing on registers with non-logic cell location assignments
Info: Completed User Assigned Global Signals Promotion Operation
Info: Automatically promoted signal "clk" to use Global clock in PIN 18
Info: Completed Auto Global Promotion Operation
Info: Starting register packing
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Moving registers into LUTs to improve timing and density
Info: Started processing fast register assignments
Info: Finished processing fast register assignments
Info: Finished moving registers into LUTs
Info: Finished register packing
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:01
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Fitter placement operations ending: elapsed time is 00:00:05
Info: Estimated most critical path is register to register delay of 17.133 ns
Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X14_Y9; Fanout = 8; REG Node = 'buzzer:inst|clk_div2[8]'
Info: 2: + IC(1.785 ns) + CELL(0.740 ns) = 2.525 ns; Loc. = LAB_X11_Y9; Fanout = 2; COMB Node = 'buzzer:inst|Equal~1167'
Info: 3: + IC(0.443 ns) + CELL(0.740 ns) = 3.708 ns; Loc. = LAB_X11_Y9; Fanout = 2; COMB Node = 'buzzer:inst|Equal~1169'
Info: 4: + IC(0.983 ns) + CELL(0.200 ns) = 4.891 ns; Loc. = LAB_X11_Y9; Fanout = 2; COMB Node = 'buzzer:inst|Equal~1170'
Info: 5: + IC(1.154 ns) + CELL(0.511 ns) = 6.556 ns; Loc. = LAB_X12_Y9; Fanout = 2; COMB Node = 'buzzer:inst|Equal~1172'
Info: 6: + IC(0.672 ns) + CELL(0.511 ns) = 7.739 ns; Loc. = LAB_X12_Y9; Fanout = 1; COMB Node = 'buzzer:inst|clk_div2[9]~2129'
Info: 7: + IC(0.443 ns) + CELL(0.740 ns) = 8.922 ns; Loc. = LAB_X12_Y9; Fanout = 1; COMB Node = 'buzzer:inst|clk_div2[9]~2130'
Info: 8: + IC(0.672 ns) + CELL(0.511 ns) = 10.105 ns; Loc. = LAB_X12_Y9; Fanout = 1; COMB Node = 'buzzer:inst|clk_div2[9]~2124'
Info: 9: + IC(0.672 ns) + CELL(0.511 ns) = 11.288 ns; Loc. = LAB_X12_Y9; Fanout = 1; COMB Node = 'buzzer:inst|clk_div2[9]~2125'
Info: 10: + IC(1.153 ns) + CELL(0.511 ns) = 12.952 ns; Loc. = LAB_X13_Y9; Fanout = 1; COMB Node = 'buzzer:inst|clk_div2[9]~2126'
Info: 11: + IC(0.672 ns) + CELL(0.511 ns) = 14.135 ns; Loc. = LAB_X13_Y9; Fanout = 13; COMB Node = 'buzzer:inst|clk_div2[9]~2127'
Info: 12: + IC(1.238 ns) + CELL(1.760 ns) = 17.133 ns; Loc. = LAB_X14_Y9; Fanout = 8; REG Node = 'buzzer:inst|clk_div2[11]'
Info: Total cell delay = 7.246 ns ( 42.29 % )
Info: Total interconnect delay = 9.887 ns ( 57.71 % )
Info: Fitter routing operations beginning
Info: Average interconnect usage is 1% of the available device resources. Peak interconnect usage is 3%
Info: Fitter routing operations ending: elapsed time is 00:00:03
Info: The Fitter performed an Auto Fit compilation. No optimizations were skipped because the design's timing and routability requirements required full optimization.
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
Info: Processing ended: Mon Nov 20 21:22:20 2006
Info: Elapsed time: 00:00:17
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