convert.v

Verilog 经典实例

module convert
  ( scan,
	prepared,
	clr,
	data
  );
	input  [7:0] scan;
	input        prepared;
	input        clr;
	output [7:0] data;
	
	reg    [7:0] tmpASCII;
	reg    [7:0] ASCII;
	reg    		 keypressed_D = 0;
	reg          shifted_D = 0;
	reg          capslocked_D = 0;
    wire    	  keypressed;
	wire          shifted;
	wire          capslocked;
	
	always @(scan or clr or keypressed)
	begin
		if(!clr) begin
		   shifted_D <= 0;
		   capslocked_D <= 0;
		   keypressed_D <= 0;
		end
		else begin
		  
		  keypressed_D <= (scan == 8'hF0)? 1'b1 : 1'b0;
		/*  if (scan == 8'hF0) begin 
		       keypressed_D <= 1'b1;
		    end
		   else begin 
		       keypressed_D <= 1'b0;
		   end*/
		  shifted_D <= (scan == 8'h12 || scan == 8'h59)? !shifted : shifted;
	/*	  if (scan == 8'h12 || scan == 8'h59) begin
		       shifted_D <= !shifted;
		   end
		   else begin 
		       shifted_D <= shifted;
		   end  */
		   capslocked_D <= (scan == 8'h58 && keypressed == 1'b1)? !capslocked : capslocked;
	/*	  if (scan == 8'h58 && keypressed == 1'b1) begin
		       capslocked_D <= !capslocked;
		    end
		   else begin
		       capslocked_D <= capslocked;
		    end */
		end
	end
	always @(scan or shifted or clr)
	begin
		if(!clr) begin
			tmpASCII <= 0;
		end
		else begin
			case (scan)
			  8'b00001101 : tmpASCII <= 8'h09;
			  8'b00001110 : tmpASCII <= shifted ? 8'h7E : 8'h60;
			  8'b00010101 : tmpASCII <= 8'h51;
			  8'b00010110 : tmpASCII <= shifted ? 8'h21 : 8'h31;
			  8'b00011010 : tmpASCII <= 8'h5A;
			  8'b00011011 : tmpASCII <= 8'h53;
			  8'b00011100 : tmpASCII <= 8'h41;
			  8'b00011101 : tmpASCII <= 8'h57;
			  8'b00011110 : tmpASCII <= shifted ? 8'h40 : 8'h32;
			  8'b00100001 : tmpASCII <= 8'h43;
			  8'b00100010 : tmpASCII <= 8'h58;
			  8'b00100011 : tmpASCII <= 8'h44;
			  8'b00100100 : tmpASCII <= 8'h45;
			  8'b00100101 : tmpASCII <= shifted ? 8'h24 : 8'h34;
			  8'b00100110 : tmpASCII <= shifted ? 8'h23 : 8'h33;
			  8'b00101001 : tmpASCII <= 8'h20;
			  8'b00101010 : tmpASCII <= 8'h56;
			  8'b00101011 : tmpASCII <= 8'h46;
			  8'b00101100 : tmpASCII <= 8'h54;
			  8'b00101101 : tmpASCII <= 8'h52;
			  8'b00101110 : tmpASCII <= shifted ? 8'h25 : 8'h35;
			  8'b00110001 : tmpASCII <= 8'h4E;
			  8'b00110010 : tmpASCII <= 8'h42;
			  8'b00110011 : tmpASCII <= 8'h48;
			  8'b00110100 : tmpASCII <= 8'h47;
			  8'b00110101 : tmpASCII <= 8'h59;
			  8'b00110110 : tmpASCII <= shifted ? 8'h5E : 8'h36;
			  8'b00111010 : tmpASCII <= 8'h4D;
			  8'b00111011 : tmpASCII <= 8'h4A;
			  8'b00111100 : tmpASCII <= 8'h55;
			  8'b00111101 : tmpASCII <= shifted ? 8'h26 : 8'h37;
			  8'b00111110 : tmpASCII <= shifted ? 8'h2A : 8'h38;
			  8'b01000001 : tmpASCII <= shifted ? 8'h3C : 8'h2C;
			  8'b01000010 : tmpASCII <= 8'h4B;
			  8'b01000011 : tmpASCII <= 8'h49;
			  8'b01000100 : tmpASCII <= 8'h4F;
			  8'b01000101 : tmpASCII <= shifted ? 8'h29 : 8'h30;
			  8'b01000110 : tmpASCII <= shifted ? 8'h28 : 8'h39;
			  8'b01001001 : tmpASCII <= shifted ? 8'h3E : 8'h2E;
			  8'b01001010 : tmpASCII <= shifted ? 8'h3F : 8'h2F;
			  8'b01001011 : tmpASCII <= 8'h4C;
			  8'b01001100 : tmpASCII <= shifted ? 8'h3A : 8'h3B;
			  8'b01001101 : tmpASCII <= 8'h50;
			  8'b01001110 : tmpASCII <= shifted ? 8'h5F : 8'h2D;
			  8'b01010010 : tmpASCII <= shifted ? 8'h22 : 8'h27;
			  8'b01010100 : tmpASCII <= shifted ? 8'h7B : 8'h5B;
			  8'b01010101 : tmpASCII <= shifted ? 8'h2B : 8'h3D;
			  8'b01011010 : tmpASCII <= 8'h0D;
			  8'b01011011 : tmpASCII <= shifted ? 8'h7D : 8'h5D;
			  8'b01011101 : tmpASCII <= shifted ? 8'h7C : 8'h5C;
			  8'b01100110 : tmpASCII <= 8'h08;
			  8'b01110110 : tmpASCII <= 8'h1B; 
			endcase
		end
	end
	always @(tmpASCII or shifted or clr or keypressed or capslocked)
	begin
	  if(!clr) begin
	     ASCII <= 0;
	  end
	  else begin
	     if (keypressed) begin
	        if (((!shifted & !capslocked)|(shifted & capslocked)) && (tmpASCII > 8'h40) && (tmpASCII <= 8'h5A)) begin
	          ASCII <= tmpASCII + 8'h20;
	        end
	        else begin
	          ASCII <= tmpASCII;
	        end
	     end
	     else begin
	       ASCII <= 8'b1000_0000;
	     end
	  end    
	end
	
	mydff dff_component1 (.data (keypressed_D), .q(keypressed), .clock (prepared));
	mydff dff_component2 (.data (shifted_D), .q (shifted), .clock (prepared));
	mydff dff_component3 (.data (capslocked_D), .q (capslocked), .clock (prepared));
	
	assign data = ASCII;
endmodule