t2b.v

来自「温度码到二进制吗的转换的verilogHDL代码。」· Verilog 代码 · 共 41 行

V
41
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module thermometer2binary(
	clk,
	a,
	c,
	d);
	input clk;
	input [15:0] a;
	output [3:0] c;
	output [3:0] d;
	
	wire [7:0] b;
	wire [3:0] c1;
	wire [3:0] d1;
	reg [3:0] c;
	reg [3:0] d;
	
	assign b[0] = ~(a[8]|~a[0]);
	assign b[1] = ~(a[9]|~a[1]);
	assign b[2] = ~(a[10]|~a[2]);
	assign b[3] = ~(a[11]|~a[3]);
	assign b[4] = ~(a[12]|~a[4]);
	assign b[5] = ~(a[13]|~a[5]);
	assign b[6] = ~(a[14]|~a[6]);
	assign b[7] = ~(a[15]|~a[7]);
	
	assign c1[3] = b[7];
	assign c1[2] = b[7]^b[3];
	assign c1[1] = (b[7]^b[5])|(b[3]^b[1]);
	assign c1[0] = (b[7]^b[6])|(b[5]^b[4])|(b[3]^b[2])|(b[1]^b[0]);
	
	assign d1[3] = ~((~a[15])&a[11]&a[3]|a[11]&a[7]&a[3]);
	assign d1[2] = ~((~a[14])&a[10]&a[2]|a[10]&a[6]&a[2]);
	assign d1[1] = ~((~a[13])&a[9]&a[1]|a[9]&a[5]&a[1]);
	assign d1[0] = ~((~a[12])&a[8]&a[0]|a[8]&a[4]&a[0]);
	
	always@(posedge clk)begin
		c[3:0] <= c1[3:0];
		d[3:0] <= d1[3:0];
	end
	
endmodule

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