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📄 sec_clock_vhd.sdo

📁 基于CYCLONE系列FPGA EP1C3T144C8的VHDL秒表代码
💻 SDO
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        (IOPATH cin1 cout (258:258:258) (258:258:258))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\num\[8\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (1830:1830:1830) (1830:1830:1830))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1261:1261:1261) (1261:1261:1261))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\num\[9\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (510:510:510) (510:510:510))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin regin (898:898:898) (898:898:898))
        (IOPATH datab cout0 (423:423:423) (423:423:423))
        (IOPATH datab cout1 (432:432:432) (432:432:432))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\num\[9\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2347:2347:2347) (2347:2347:2347))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1261:1261:1261) (1261:1261:1261))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\num\[10\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (529:529:529) (529:529:529))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin regin (898:898:898) (898:898:898))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH dataa cout0 (564:564:564) (564:564:564))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH dataa cout1 (575:575:575) (575:575:575))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\num\[10\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2347:2347:2347) (2347:2347:2347))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1261:1261:1261) (1261:1261:1261))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\num\[11\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (533:533:533) (533:533:533))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin regin (898:898:898) (898:898:898))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH dataa cout0 (564:564:564) (564:564:564))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH dataa cout1 (575:575:575) (575:575:575))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\num\[11\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2347:2347:2347) (2347:2347:2347))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1261:1261:1261) (1261:1261:1261))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\num\[12\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (513:513:513) (513:513:513))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin regin (898:898:898) (898:898:898))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH datab cout0 (423:423:423) (423:423:423))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH datab cout1 (432:432:432) (432:432:432))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\num\[12\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2347:2347:2347) (2347:2347:2347))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1261:1261:1261) (1261:1261:1261))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\num\[13\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (507:507:507) (507:507:507))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin regin (898:898:898) (898:898:898))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH datab cout (583:583:583) (583:583:583))
        (IOPATH cin cout (136:136:136) (136:136:136))
        (IOPATH cin0 cout (178:178:178) (178:178:178))
        (IOPATH cin1 cout (157:157:157) (157:157:157))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\num\[13\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2347:2347:2347) (2347:2347:2347))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1261:1261:1261) (1261:1261:1261))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\num\[14\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (510:510:510) (510:510:510))
        (IOPATH datab regin (607:607:607) (607:607:607))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH datab cout0 (423:423:423) (423:423:423))
        (IOPATH datab cout1 (432:432:432) (432:432:432))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\num\[14\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2347:2347:2347) (2347:2347:2347))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1261:1261:1261) (1261:1261:1261))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\num\[15\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (529:529:529) (529:529:529))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
        (IOPATH dataa cout0 (564:564:564) (564:564:564))
        (IOPATH cin0 cout0 (78:78:78) (78:78:78))
        (IOPATH dataa cout1 (575:575:575) (575:575:575))
        (IOPATH cin1 cout1 (80:80:80) (80:80:80))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\num\[15\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2347:2347:2347) (2347:2347:2347))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1261:1261:1261) (1261:1261:1261))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\num\[18\]\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (535:535:535) (535:535:535))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH cin regin (839:839:839) (839:839:839))
        (IOPATH cin0 regin (783:783:783) (783:783:783))
        (IOPATH cin1 regin (787:787:787) (787:787:787))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE \\num\[18\]\\.lereg)
    (DELAY
      (ABSOLUTE
        (PORT sclr (2347:2347:2347) (2347:2347:2347))
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1261:1261:1261) (1261:1261:1261))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (SETUP sclr (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
      (HOLD sclr (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE clk1.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (527:527:527) (527:527:527))
        (PORT datac (444:444:444) (444:444:444))
        (IOPATH dataa regin (738:738:738) (738:738:738))
        (IOPATH datac regin (478:478:478) (478:478:478))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_lcell_register")
    (INSTANCE clk1.lereg)
    (DELAY
      (ABSOLUTE
        (PORT aclr (898:898:898) (898:898:898))
        (PORT clk (1261:1261:1261) (1261:1261:1261))
        (IOPATH (posedge clk) regout (224:224:224) (224:224:224))
        (IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (37:37:37))
      (HOLD datain (posedge clk) (15:15:15))
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\LessThan0\~279\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datac (1596:1596:1596) (1596:1596:1596))
        (PORT datad (1579:1579:1579) (1579:1579:1579))
        (IOPATH datac combout (292:292:292) (292:292:292))
        (IOPATH datad combout (114:114:114) (114:114:114))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\LessThan0\~280\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (542:542:542) (542:542:542))
        (PORT datab (521:521:521) (521:521:521))
        (PORT datac (560:560:560) (560:560:560))
        (PORT datad (535:535:535) (535:535:535))
        (IOPATH dataa combout (590:590:590) (590:590:590))
        (IOPATH datab combout (442:442:442) (442:442:442))
        (IOPATH datac combout (292:292:292) (292:292:292))
        (IOPATH datad combout (114:114:114) (114:114:114))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\LessThan0\~281\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT datab (1131:1131:1131) (1131:1131:1131))
        (PORT datac (725:725:725) (725:725:725))
        (PORT datad (1136:1136:1136) (1136:1136:1136))
        (IOPATH datab combout (442:442:442) (442:442:442))
        (IOPATH datac combout (292:292:292) (292:292:292))
        (IOPATH datad combout (114:114:114) (114:114:114))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\LessThan0\~282\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1146:1146:1146) (1146:1146:1146))
        (PORT datab (752:752:752) (752:752:752))
        (PORT datac (772:772:772) (772:772:772))
        (PORT datad (182:182:182) (182:182:182))
        (IOPATH dataa combout (590:590:590) (590:590:590))
        (IOPATH datab combout (442:442:442) (442:442:442))
        (IOPATH datac combout (292:292:292) (292:292:292))
        (IOPATH datad combout (114:114:114) (114:114:114))
      )
    )
  )
  (CELL
    (CELLTYPE "cyclone_asynch_lcell")
    (INSTANCE \\LessThan0\~283\\.lecomb)
    (DELAY
      (ABSOLUTE
        (PORT dataa (1471:1471:1471) (1471:1471:1471))
        (PORT datab (1463:1463:1463) (1463:1463:1463))
        (PORT datac (1439:1439:1439) (1439:1439:1439))

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