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📄 sec_clock.vho

📁 基于CYCLONE系列FPGA EP1C3T144C8的VHDL秒表代码
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	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	dataa => num(9),
	datab => num(11),
	datac => num(10),
	datad => \LessThan0~282_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \LessThan0~283_combout\);

\LessThan0~284\ : cyclone_lcell
-- Equation(s):
-- \LessThan0~284_combout\ = !num(14) & !num(12) & !num(15) & !num(13)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0001",
	operation_mode => "normal",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	dataa => num(14),
	datab => num(12),
	datac => num(15),
	datad => num(13),
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \LessThan0~284_combout\);

\LessThan0~285\ : cyclone_lcell
-- Equation(s):
-- \LessThan0~285_combout\ = num(18) # !\LessThan0~279_combout\ & (!\LessThan0~283_combout\ # !\LessThan0~284_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "abbb",
	operation_mode => "normal",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	dataa => num(18),
	datab => \LessThan0~279_combout\,
	datac => \LessThan0~284_combout\,
	datad => \LessThan0~283_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \LessThan0~285_combout\);

\clk~I\ : cyclone_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_clk,
	combout => \clk~combout\);

\start~I\ : cyclone_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_start,
	combout => \start~combout\);

\rst~I\ : cyclone_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_rst,
	combout => \rst~combout\);

\Add2~162\ : cyclone_lcell
-- Equation(s):
-- \Add2~162_combout\ = !\P2:scan[0]~regout\
-- \Add2~163\ = CARRY(\P2:scan[0]~regout\)
-- \Add2~163COUT1\ = CARRY(\P2:scan[0]~regout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "33cc",
	operation_mode => "arithmetic",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	datab => \P2:scan[0]~regout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \Add2~162_combout\,
	cout0 => \Add2~163\,
	cout1 => \Add2~163COUT1\);

\P2:scan[0]\ : cyclone_lcell
-- Equation(s):
-- \Equal0~98\ = \P2:scan[2]~regout\ & \P2:scan[3]~regout\ & \P2:scan[0] & \P2:scan[1]~regout\
-- \P2:scan[0]~regout\ = DFFEAS(\Equal0~98\, GLOBAL(\clk~combout\), VCC, , , \Add2~162_combout\, , , VCC)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "8000",
	operation_mode => "normal",
	output_mode => "reg_and_comb",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	dataa => \P2:scan[2]~regout\,
	datab => \P2:scan[3]~regout\,
	datac => \Add2~162_combout\,
	datad => \P2:scan[1]~regout\,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \Equal0~98\,
	regout => \P2:scan[0]~regout\);

\Add2~164\ : cyclone_lcell
-- Equation(s):
-- \Add2~164_combout\ = \P2:scan[1]~regout\ $ (\Add2~163\)
-- \Add2~165\ = CARRY(!\Add2~163\ # !\P2:scan[1]~regout\)
-- \Add2~165COUT1\ = CARRY(!\Add2~163COUT1\ # !\P2:scan[1]~regout\)

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	lut_mask => "5a5f",
	operation_mode => "arithmetic",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	dataa => \P2:scan[1]~regout\,
	cin0 => \Add2~163\,
	cin1 => \Add2~163COUT1\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \Add2~164_combout\,
	cout0 => \Add2~165\,
	cout1 => \Add2~165COUT1\);

\P2:scan[1]\ : cyclone_lcell
-- Equation(s):
-- \P2:scan[1]~regout\ = DFFEAS(\Add2~164_combout\, GLOBAL(\clk~combout\), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	lut_mask => "ff00",
	operation_mode => "normal",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	datad => \Add2~164_combout\,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \P2:scan[1]~regout\);

\Add2~166\ : cyclone_lcell
-- Equation(s):
-- \Add2~166_combout\ = \P2:scan[2]~regout\ $ (!\Add2~165\)
-- \Add2~167\ = CARRY(\P2:scan[2]~regout\ & (!\Add2~165\))
-- \Add2~167COUT1\ = CARRY(\P2:scan[2]~regout\ & (!\Add2~165COUT1\))

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	lut_mask => "a50a",
	operation_mode => "arithmetic",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	dataa => \P2:scan[2]~regout\,
	cin0 => \Add2~165\,
	cin1 => \Add2~165COUT1\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \Add2~166_combout\,
	cout0 => \Add2~167\,
	cout1 => \Add2~167COUT1\);

\P2:scan[2]\ : cyclone_lcell
-- Equation(s):
-- \P2:scan[2]~regout\ = DFFEAS(GND, GLOBAL(\clk~combout\), VCC, , , \Add2~166_combout\, , , VCC)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000",
	operation_mode => "normal",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	datac => \Add2~166_combout\,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \P2:scan[2]~regout\);

\Add2~168\ : cyclone_lcell
-- Equation(s):
-- \Add2~168_combout\ = \P2:scan[3]~regout\ $ \Add2~167\
-- \Add2~169\ = CARRY(!\Add2~167\ # !\P2:scan[3]~regout\)
-- \Add2~169COUT1\ = CARRY(!\Add2~167COUT1\ # !\P2:scan[3]~regout\)

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	lut_mask => "3c3f",
	operation_mode => "arithmetic",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	datab => \P2:scan[3]~regout\,
	cin0 => \Add2~167\,
	cin1 => \Add2~167COUT1\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \Add2~168_combout\,
	cout0 => \Add2~169\,
	cout1 => \Add2~169COUT1\);

\P2:scan[3]\ : cyclone_lcell
-- Equation(s):
-- \P2:scan[3]~regout\ = DFFEAS(GND, GLOBAL(\clk~combout\), VCC, , , \Add2~168_combout\, , , VCC)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000",
	operation_mode => "normal",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	datac => \Add2~168_combout\,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \P2:scan[3]~regout\);

\Add2~174\ : cyclone_lcell
-- Equation(s):
-- \Add2~174_combout\ = \P2:scan[4]~regout\ $ !\Add2~169\
-- \Add2~175\ = CARRY(\P2:scan[4]~regout\ & !\Add2~169COUT1\)

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	lut_mask => "c30c",
	operation_mode => "arithmetic",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	datab => \P2:scan[4]~regout\,
	cin0 => \Add2~169\,
	cin1 => \Add2~169COUT1\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \Add2~174_combout\,
	cout => \Add2~175\);

\P2:scan[4]\ : cyclone_lcell
-- Equation(s):
-- \P2:scan[4]~regout\ = DFFEAS(\Add2~174_combout\ & !\Equal0~101_combout\, GLOBAL(\clk~combout\), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	lut_mask => "00f0",
	operation_mode => "normal",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	datac => \Add2~174_combout\,
	datad => \Equal0~101_combout\,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \P2:scan[4]~regout\);

\Add2~176\ : cyclone_lcell
-- Equation(s):
-- \Add2~176_combout\ = \P2:scan[5]~regout\ $ (\Add2~175\)
-- \Add2~177\ = CARRY(!\Add2~175\ # !\P2:scan[5]~regout\)
-- \Add2~177COUT1\ = CARRY(!\Add2~175\ # !\P2:scan[5]~regout\)

-- pragma translate_off
GENERIC MAP (
	cin_used => "true",
	lut_mask => "5a5f",
	operation_mode => "arithmetic",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	dataa => \P2:scan[5]~regout\,
	cin => \Add2~175\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \Add2~176_combout\,
	cout0 => \Add2~177\,
	cout1 => \Add2~177COUT1\);

\P2:scan[5]\ : cyclone_lcell
-- Equation(s):
-- \Equal0~99\ = \P2:scan[6]~regout\ & !\P2:scan[4]~regout\ & !\P2:scan[5] & \P2:scan[7]~regout\
-- \P2:scan[5]~regout\ = DFFEAS(\Equal0~99\, GLOBAL(\clk~combout\), VCC, , , \Add2~176_combout\, , , VCC)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0200",
	operation_mode => "normal",
	output_mode => "reg_and_comb",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	dataa => \P2:scan[6]~regout\,
	datab => \P2:scan[4]~regout\,
	datac => \Add2~176_combout\,
	datad => \P2:scan[7]~regout\,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \Equal0~99\,
	regout => \P2:scan[5]~regout\);

\Add2~170\ : cyclone_lcell
-- Equation(s):
-- \Add2~170_combout\ = \P2:scan[6]~regout\ $ (!(!\Add2~175\ & \Add2~177\) # (\Add2~175\ & \Add2~177COUT1\))
-- \Add2~171\ = CARRY(\P2:scan[6]~regout\ & (!\Add2~177\))
-- \Add2~171COUT1\ = CARRY(\P2:scan[6]~regout\ & (!\Add2~177COUT1\))

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	cin_used => "true",
	lut_mask => "a50a",
	operation_mode => "arithmetic",
	output_mode => "comb_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "off")
-- pragma translate_on
PORT MAP (
	dataa => \P2:scan[6]~regout\,
	cin => \Add2~175\,
	cin0 => \Add2~177\,
	cin1 => \Add2~177COUT1\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \Add2~170_combout\,
	cout0 => \Add2~171\,
	cout1 => \Add2~171COUT1\);

\P2:scan[6]\ : cyclone_lcell
-- Equation(s):
-- \P2:scan[6]~regout\ = DFFEAS(!\Equal0~101_combout\ & \Add2~170_combout\, GLOBAL(\clk~combout\), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0f00",
	operation_mode => "normal",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "off")
-- pragma translate_on
12345

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