texitype_select.vhd

来自「基于fpga的出租车计费系统」· VHDL 代码 · 共 36 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity texitype_select is
port( clk : in std_logic;
      start : in std_logic;
      cartype : in std_logic_vector(1 downto 0);
      oclk : out std_logic);
end entity;
architecture behav of texitype_select is
  signal typecounter : std_logic_vector(5 downto 0);
  signal temp : std_logic_vector(5 downto 0);
begin
  typecounter<="111101" when cartype="00"  --520mm/61分频
         else "111011" when cartype="01"  --540mm/59分频
         else "111001" when cartype="10"  --560mm/57分频
         else "111000" ;                  --580mm/55分频

  process(clk,temp,typecounter)
  begin
   if start='0' then
    temp<="000000";
   else
    if rising_edge(clk) then
      temp<=temp+'1';
    end if;
    if temp=(typecounter) then
       temp<=(others=>'0');
    end if;
   end if;
  end process;

    oclk<='1' when (temp=typecounter-'1') else '0';
end behav;