📄 count_money.tan.qmsg
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{ "Info" "ITDB_FULL_TPD_RESULT" "dip\[0\] money\[3\] 9.074 ns Longest " "Info: Longest tpd from source pin \"dip\[0\]\" to destination pin \"money\[3\]\" is 9.074 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.979 ns) 0.979 ns dip\[0\] 1 PIN PIN_D13 3 " "Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_D13; Fanout = 3; PIN Node = 'dip\[0\]'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { dip[0] } "NODE_NAME" } } { "count_money.vhd" "" { Text "E:/SOPClab/digital_system_design/texi_jifei_system/count_money/count_money.vhd" 8 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.879 ns) + CELL(0.275 ns) 2.133 ns LessThan0~350 2 COMB LCCOMB_X29_Y35_N2 1 " "Info: 2: + IC(0.879 ns) + CELL(0.275 ns) = 2.133 ns; Loc. = LCCOMB_X29_Y35_N2; Fanout = 1; COMB Node = 'LessThan0~350'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.154 ns" { dip[0] LessThan0~350 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 1547 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.246 ns) + CELL(0.150 ns) 2.529 ns LessThan0~351 3 COMB LCCOMB_X29_Y35_N6 1 " "Info: 3: + IC(0.246 ns) + CELL(0.150 ns) = 2.529 ns; Loc. = LCCOMB_X29_Y35_N6; Fanout = 1; COMB Node = 'LessThan0~351'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.396 ns" { LessThan0~350 LessThan0~351 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 1547 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.267 ns) + CELL(0.438 ns) 3.234 ns LessThan0~352 4 COMB LCCOMB_X29_Y35_N0 4 " "Info: 4: + IC(0.267 ns) + CELL(0.438 ns) = 3.234 ns; Loc. = LCCOMB_X29_Y35_N0; Fanout = 4; COMB Node = 'LessThan0~352'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.705 ns" { LessThan0~351 LessThan0~352 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 1547 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.451 ns) + CELL(0.275 ns) 3.960 ns money~454 5 COMB LCCOMB_X30_Y35_N16 1 " "Info: 5: + IC(0.451 ns) + CELL(0.275 ns) = 3.960 ns; Loc. = LCCOMB_X30_Y35_N16; Fanout = 1; COMB Node = 'money~454'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.726 ns" { LessThan0~352 money~454 } "NODE_NAME" } } { "count_money.vhd" "" { Text "E:/SOPClab/digital_system_design/texi_jifei_system/count_money/count_money.vhd" 9 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.472 ns) + CELL(2.642 ns) 9.074 ns money\[3\] 6 PIN PIN_D23 0 " "Info: 6: + IC(2.472 ns) + CELL(2.642 ns) = 9.074 ns; Loc. = PIN_D23; Fanout = 0; PIN Node = 'money\[3\]'" { } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "5.114 ns" { money~454 money[3] } "NODE_NAME" } } { "count_money.vhd" "" { Text "E:/SOPClab/digital_system_design/texi_jifei_system/count_money/count_money.vhd" 9 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.759 ns ( 52.45 % ) " "Info: Total cell delay = 4.759 ns ( 52.45 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.315 ns ( 47.55 % ) " "Info: Total interconnect delay = 4.315 ns ( 47.55 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "9.074 ns" { dip[0] LessThan0~350 LessThan0~351 LessThan0~352 money~454 money[3] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "9.074 ns" { dip[0] dip[0]~combout LessThan0~350 LessThan0~351 LessThan0~352 money~454 money[3] } { 0.000ns 0.000ns 0.879ns 0.246ns 0.267ns 0.451ns 2.472ns } { 0.000ns 0.979ns 0.275ns 0.150ns 0.438ns 0.275ns 2.642ns } } } } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1 Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Oct 08 19:35:47 2008 " "Info: Processing ended: Wed Oct 08 19:35:47 2008" { } { } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
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