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📄 count_money.tan.rpt

📁 基于fpga的出租车计费系统
💻 RPT
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+----------------------------------------------------------------------+
; tco                                                                  ;
+-------+--------------+------------+----------+----------+------------+
; Slack ; Required tco ; Actual tco ; From     ; To       ; From Clock ;
+-------+--------------+------------+----------+----------+------------+
; N/A   ; None         ; 10.829 ns  ; temp0[0] ; money[3] ; clkin      ;
; N/A   ; None         ; 10.806 ns  ; temp0[1] ; money[3] ; clkin      ;
; N/A   ; None         ; 10.410 ns  ; temp0[3] ; money[3] ; clkin      ;
; N/A   ; None         ; 10.267 ns  ; temp0[2] ; money[3] ; clkin      ;
; N/A   ; None         ; 10.134 ns  ; temp0[5] ; money[3] ; clkin      ;
; N/A   ; None         ; 10.104 ns  ; temp0[6] ; money[3] ; clkin      ;
; N/A   ; None         ; 9.926 ns   ; temp0[7] ; money[3] ; clkin      ;
; N/A   ; None         ; 9.828 ns   ; temp0[4] ; money[3] ; clkin      ;
; N/A   ; None         ; 9.530 ns   ; temp0[9] ; money[3] ; clkin      ;
; N/A   ; None         ; 9.360 ns   ; temp0[8] ; money[3] ; clkin      ;
; N/A   ; None         ; 9.293 ns   ; temp0[0] ; money[2] ; clkin      ;
; N/A   ; None         ; 9.270 ns   ; temp0[1] ; money[2] ; clkin      ;
; N/A   ; None         ; 9.230 ns   ; temp0[0] ; money[1] ; clkin      ;
; N/A   ; None         ; 9.207 ns   ; temp0[1] ; money[1] ; clkin      ;
; N/A   ; None         ; 9.079 ns   ; temp0[0] ; money[0] ; clkin      ;
; N/A   ; None         ; 9.056 ns   ; temp0[1] ; money[0] ; clkin      ;
; N/A   ; None         ; 8.874 ns   ; temp0[3] ; money[2] ; clkin      ;
; N/A   ; None         ; 8.811 ns   ; temp0[3] ; money[1] ; clkin      ;
; N/A   ; None         ; 8.731 ns   ; temp0[2] ; money[2] ; clkin      ;
; N/A   ; None         ; 8.668 ns   ; temp0[2] ; money[1] ; clkin      ;
; N/A   ; None         ; 8.660 ns   ; temp0[3] ; money[0] ; clkin      ;
; N/A   ; None         ; 8.598 ns   ; temp0[5] ; money[2] ; clkin      ;
; N/A   ; None         ; 8.568 ns   ; temp0[6] ; money[2] ; clkin      ;
; N/A   ; None         ; 8.535 ns   ; temp0[5] ; money[1] ; clkin      ;
; N/A   ; None         ; 8.517 ns   ; temp0[2] ; money[0] ; clkin      ;
; N/A   ; None         ; 8.505 ns   ; temp0[6] ; money[1] ; clkin      ;
; N/A   ; None         ; 8.390 ns   ; temp0[7] ; money[2] ; clkin      ;
; N/A   ; None         ; 8.384 ns   ; temp0[5] ; money[0] ; clkin      ;
; N/A   ; None         ; 8.354 ns   ; temp0[6] ; money[0] ; clkin      ;
; N/A   ; None         ; 8.327 ns   ; temp0[7] ; money[1] ; clkin      ;
; N/A   ; None         ; 8.292 ns   ; temp0[4] ; money[2] ; clkin      ;
; N/A   ; None         ; 8.229 ns   ; temp0[4] ; money[1] ; clkin      ;
; N/A   ; None         ; 8.176 ns   ; temp0[7] ; money[0] ; clkin      ;
; N/A   ; None         ; 8.078 ns   ; temp0[4] ; money[0] ; clkin      ;
; N/A   ; None         ; 7.994 ns   ; temp0[9] ; money[2] ; clkin      ;
; N/A   ; None         ; 7.931 ns   ; temp0[9] ; money[1] ; clkin      ;
; N/A   ; None         ; 7.824 ns   ; temp0[8] ; money[2] ; clkin      ;
; N/A   ; None         ; 7.780 ns   ; temp0[9] ; money[0] ; clkin      ;
; N/A   ; None         ; 7.761 ns   ; temp0[8] ; money[1] ; clkin      ;
; N/A   ; None         ; 7.610 ns   ; temp0[8] ; money[0] ; clkin      ;
; N/A   ; None         ; 7.481 ns   ; temp0[5] ; money[5] ; clkin      ;
; N/A   ; None         ; 6.636 ns   ; temp0[4] ; money[4] ; clkin      ;
; N/A   ; None         ; 6.602 ns   ; temp0[9] ; money[9] ; clkin      ;
; N/A   ; None         ; 6.405 ns   ; temp0[7] ; money[7] ; clkin      ;
; N/A   ; None         ; 6.373 ns   ; temp0[6] ; money[6] ; clkin      ;
; N/A   ; None         ; 6.367 ns   ; temp0[8] ; money[8] ; clkin      ;
+-------+--------------+------------+----------+----------+------------+


+-----------------------------------------------------------------+
; tpd                                                             ;
+-------+-------------------+-----------------+--------+----------+
; Slack ; Required P2P Time ; Actual P2P Time ; From   ; To       ;
+-------+-------------------+-----------------+--------+----------+
; N/A   ; None              ; 9.074 ns        ; dip[0] ; money[3] ;
; N/A   ; None              ; 8.960 ns        ; dip[1] ; money[3] ;
; N/A   ; None              ; 7.538 ns        ; dip[0] ; money[2] ;
; N/A   ; None              ; 7.475 ns        ; dip[0] ; money[1] ;
; N/A   ; None              ; 7.424 ns        ; dip[1] ; money[2] ;
; N/A   ; None              ; 7.361 ns        ; dip[1] ; money[1] ;
; N/A   ; None              ; 7.324 ns        ; dip[0] ; money[0] ;
; N/A   ; None              ; 7.210 ns        ; dip[1] ; money[0] ;
+-------+-------------------+-----------------+--------+----------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Wed Oct 08 19:35:47 2008
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off count_money -c count_money --timing_analysis_only
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "clkin" is an undefined clock
Info: Clock "clkin" Internal fmax is restricted to 420.17 MHz between source register "temp0[1]" and destination register "temp0[9]"
    Info: fmax restricted to clock pin edge rate 2.38 ns. Expand message to see actual delay path.
        Info: + Longest register to register delay is 1.826 ns
            Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X29_Y35_N11; Fanout = 4; REG Node = 'temp0[1]'
            Info: 2: + IC(0.333 ns) + CELL(0.414 ns) = 0.747 ns; Loc. = LCCOMB_X29_Y35_N10; Fanout = 2; COMB Node = 'temp0[1]~95'
            Info: 3: + IC(0.000 ns) + CELL(0.071 ns) = 0.818 ns; Loc. = LCCOMB_X29_Y35_N12; Fanout = 2; COMB Node = 'temp0[2]~96'
            Info: 4: + IC(0.000 ns) + CELL(0.159 ns) = 0.977 ns; Loc. = LCCOMB_X29_Y35_N14; Fanout = 2; COMB Node = 'temp0[3]~97'
            Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 1.048 ns; Loc. = LCCOMB_X29_Y35_N16; Fanout = 2; COMB Node = 'temp0[4]~98'
            Info: 6: + IC(0.000 ns) + CELL(0.071 ns) = 1.119 ns; Loc. = LCCOMB_X29_Y35_N18; Fanout = 2; COMB Node = 'temp0[5]~99'
            Info: 7: + IC(0.000 ns) + CELL(0.071 ns) = 1.190 ns; Loc. = LCCOMB_X29_Y35_N20; Fanout = 2; COMB Node = 'temp0[6]~100'
            Info: 8: + IC(0.000 ns) + CELL(0.071 ns) = 1.261 ns; Loc. = LCCOMB_X29_Y35_N22; Fanout = 2; COMB Node = 'temp0[7]~101'
            Info: 9: + IC(0.000 ns) + CELL(0.071 ns) = 1.332 ns; Loc. = LCCOMB_X29_Y35_N24; Fanout = 1; COMB Node = 'temp0[8]~102'
            Info: 10: + IC(0.000 ns) + CELL(0.410 ns) = 1.742 ns; Loc. = LCCOMB_X29_Y35_N26; Fanout = 1; COMB Node = 'temp0[9]~43'
            Info: 11: + IC(0.000 ns) + CELL(0.084 ns) = 1.826 ns; Loc. = LCFF_X29_Y35_N27; Fanout = 3; REG Node = 'temp0[9]'
            Info: Total cell delay = 1.493 ns ( 81.76 % )
            Info: Total interconnect delay = 0.333 ns ( 18.24 % )
        Info: - Smallest clock skew is 0.000 ns
            Info: + Shortest clock path from clock "clkin" to destination register is 2.697 ns
                Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_P2; Fanout = 1; CLK Node = 'clkin'
                Info: 2: + IC(0.118 ns) + CELL(0.000 ns) = 1.117 ns; Loc. = CLKCTRL_G3; Fanout = 10; COMB Node = 'clkin~clkctrl'
                Info: 3: + IC(1.043 ns) + CELL(0.537 ns) = 2.697 ns; Loc. = LCFF_X29_Y35_N27; Fanout = 3; REG Node = 'temp0[9]'
                Info: Total cell delay = 1.536 ns ( 56.95 % )
                Info: Total interconnect delay = 1.161 ns ( 43.05 % )
            Info: - Longest clock path from clock "clkin" to source register is 2.697 ns
                Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_P2; Fanout = 1; CLK Node = 'clkin'
                Info: 2: + IC(0.118 ns) + CELL(0.000 ns) = 1.117 ns; Loc. = CLKCTRL_G3; Fanout = 10; COMB Node = 'clkin~clkctrl'
                Info: 3: + IC(1.043 ns) + CELL(0.537 ns) = 2.697 ns; Loc. = LCFF_X29_Y35_N11; Fanout = 4; REG Node = 'temp0[1]'
                Info: Total cell delay = 1.536 ns ( 56.95 % )
                Info: Total interconnect delay = 1.161 ns ( 43.05 % )
        Info: + Micro clock to output delay of source is 0.250 ns
        Info: + Micro setup delay of destination is -0.036 ns
Info: tco from clock "clkin" to destination pin "money[3]" through register "temp0[0]" is 10.829 ns
    Info: + Longest clock path from clock "clkin" to source register is 2.697 ns
        Info: 1: + IC(0.000 ns) + CELL(0.999 ns) = 0.999 ns; Loc. = PIN_P2; Fanout = 1; CLK Node = 'clkin'
        Info: 2: + IC(0.118 ns) + CELL(0.000 ns) = 1.117 ns; Loc. = CLKCTRL_G3; Fanout = 10; COMB Node = 'clkin~clkctrl'
        Info: 3: + IC(1.043 ns) + CELL(0.537 ns) = 2.697 ns; Loc. = LCFF_X29_Y35_N5; Fanout = 5; REG Node = 'temp0[0]'
        Info: Total cell delay = 1.536 ns ( 56.95 % )
        Info: Total interconnect delay = 1.161 ns ( 43.05 % )
    Info: + Micro clock to output delay of source is 0.250 ns
    Info: + Longest register to pin delay is 7.882 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X29_Y35_N5; Fanout = 5; REG Node = 'temp0[0]'
        Info: 2: + IC(0.504 ns) + CELL(0.437 ns) = 0.941 ns; Loc. = LCCOMB_X29_Y35_N2; Fanout = 1; COMB Node = 'LessThan0~350'
        Info: 3: + IC(0.246 ns) + CELL(0.150 ns) = 1.337 ns; Loc. = LCCOMB_X29_Y35_N6; Fanout = 1; COMB Node = 'LessThan0~351'
        Info: 4: + IC(0.267 ns) + CELL(0.438 ns) = 2.042 ns; Loc. = LCCOMB_X29_Y35_N0; Fanout = 4; COMB Node = 'LessThan0~352'
        Info: 5: + IC(0.451 ns) + CELL(0.275 ns) = 2.768 ns; Loc. = LCCOMB_X30_Y35_N16; Fanout = 1; COMB Node = 'money~454'
        Info: 6: + IC(2.472 ns) + CELL(2.642 ns) = 7.882 ns; Loc. = PIN_D23; Fanout = 0; PIN Node = 'money[3]'
        Info: Total cell delay = 3.942 ns ( 50.01 % )
        Info: Total interconnect delay = 3.940 ns ( 49.99 % )
Info: Longest tpd from source pin "dip[0]" to destination pin "money[3]" is 9.074 ns
    Info: 1: + IC(0.000 ns) + CELL(0.979 ns) = 0.979 ns; Loc. = PIN_D13; Fanout = 3; PIN Node = 'dip[0]'
    Info: 2: + IC(0.879 ns) + CELL(0.275 ns) = 2.133 ns; Loc. = LCCOMB_X29_Y35_N2; Fanout = 1; COMB Node = 'LessThan0~350'
    Info: 3: + IC(0.246 ns) + CELL(0.150 ns) = 2.529 ns; Loc. = LCCOMB_X29_Y35_N6; Fanout = 1; COMB Node = 'LessThan0~351'
    Info: 4: + IC(0.267 ns) + CELL(0.438 ns) = 3.234 ns; Loc. = LCCOMB_X29_Y35_N0; Fanout = 4; COMB Node = 'LessThan0~352'
    Info: 5: + IC(0.451 ns) + CELL(0.275 ns) = 3.960 ns; Loc. = LCCOMB_X30_Y35_N16; Fanout = 1; COMB Node = 'money~454'
    Info: 6: + IC(2.472 ns) + CELL(2.642 ns) = 9.074 ns; Loc. = PIN_D23; Fanout = 0; PIN Node = 'money[3]'
    Info: Total cell delay = 4.759 ns ( 52.45 % )
    Info: Total interconnect delay = 4.315 ns ( 47.55 % )
Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning
    Info: Processing ended: Wed Oct 08 19:35:47 2008
    Info: Elapsed time: 00:00:01


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