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📄 decoder.tan.rpt

📁 电子闹钟:基于fpga的电子闹钟设计
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Timing Analyzer report for decoder
Sun Oct 05 09:32:48 2008
Version 6.0 Build 178 04/27/2006 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. tpd
  5. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                          ;
+------------------------------+-------+---------------+-------------+-----------+----------+------------+----------+--------------+
; Type                         ; Slack ; Required Time ; Actual Time ; From      ; To       ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+-------------+-----------+----------+------------+----------+--------------+
; Worst-case tpd               ; N/A   ; None          ; 12.413 ns   ; keypad[9] ; value[0] ; --         ; --       ; 0            ;
; Total number of failed paths ;       ;               ;             ;           ;          ;            ;          ; 0            ;
+------------------------------+-------+---------------+-------------+-----------+----------+------------+----------+--------------+


+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                             ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                ; Setting            ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                           ; EP2C35F672C6       ;      ;    ;             ;
; Timing Models                                         ; Final              ;      ;    ;             ;
; Number of source nodes to report per destination node ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                 ; 10                 ;      ;    ;             ;
; Number of paths to report                             ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                          ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                ; Off                ;      ;    ;             ;
; Report IO Paths Separately                            ; Off                ;      ;    ;             ;
; Default hold multicycle                               ; Same As Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains             ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                        ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                      ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                 ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements               ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                      ; Off                ;      ;    ;             ;
; Enable Clock Latency                                  ; Off                ;      ;    ;             ;
; Use TimeQuest Timing Analyzer                         ; Off                ;      ;    ;             ;
+-------------------------------------------------------+--------------------+------+----+-------------+


+--------------------------------------------------------------------+
; tpd                                                                ;
+-------+-------------------+-----------------+-----------+----------+
; Slack ; Required P2P Time ; Actual P2P Time ; From      ; To       ;
+-------+-------------------+-----------------+-----------+----------+
; N/A   ; None              ; 12.413 ns       ; keypad[9] ; value[0] ;
; N/A   ; None              ; 11.923 ns       ; keypad[9] ; value[3] ;
; N/A   ; None              ; 11.522 ns       ; keypad[9] ; value[2] ;
; N/A   ; None              ; 11.444 ns       ; keypad[5] ; value[0] ;
; N/A   ; None              ; 11.385 ns       ; keypad[9] ; value[1] ;
; N/A   ; None              ; 10.925 ns       ; keypad[3] ; value[0] ;
; N/A   ; None              ; 10.864 ns       ; keypad[4] ; value[2] ;
; N/A   ; None              ; 10.800 ns       ; keypad[2] ; value[1] ;
; N/A   ; None              ; 10.626 ns       ; keypad[1] ; value[3] ;
; N/A   ; None              ; 10.622 ns       ; keypad[1] ; value[0] ;
; N/A   ; None              ; 10.589 ns       ; keypad[3] ; value[1] ;
; N/A   ; None              ; 10.515 ns       ; keypad[5] ; value[2] ;
; N/A   ; None              ; 10.490 ns       ; keypad[3] ; value[3] ;
; N/A   ; None              ; 10.485 ns       ; keypad[8] ; value[3] ;
; N/A   ; None              ; 10.442 ns       ; keypad[4] ; value[3] ;
; N/A   ; None              ; 10.436 ns       ; keypad[4] ; value[0] ;
; N/A   ; None              ; 10.353 ns       ; keypad[5] ; value[3] ;
; N/A   ; None              ; 10.349 ns       ; keypad[8] ; value[1] ;
; N/A   ; None              ; 10.346 ns       ; keypad[8] ; value[2] ;
; N/A   ; None              ; 10.336 ns       ; keypad[0] ; value[3] ;
; N/A   ; None              ; 10.329 ns       ; keypad[0] ; value[0] ;
; N/A   ; None              ; 10.266 ns       ; keypad[1] ; value[2] ;
; N/A   ; None              ; 10.091 ns       ; keypad[1] ; value[1] ;
; N/A   ; None              ; 10.071 ns       ; keypad[4] ; value[1] ;
; N/A   ; None              ; 9.979 ns        ; keypad[5] ; value[1] ;
; N/A   ; None              ; 9.964 ns        ; keypad[0] ; value[1] ;
; N/A   ; None              ; 9.933 ns        ; keypad[8] ; value[0] ;
; N/A   ; None              ; 9.884 ns        ; keypad[0] ; value[2] ;
; N/A   ; None              ; 9.750 ns        ; keypad[2] ; value[2] ;
; N/A   ; None              ; 9.730 ns        ; keypad[3] ; value[2] ;
; N/A   ; None              ; 9.638 ns        ; keypad[2] ; value[3] ;
; N/A   ; None              ; 9.625 ns        ; keypad[2] ; value[0] ;
; N/A   ; None              ; 7.249 ns        ; keypad[7] ; value[0] ;
; N/A   ; None              ; 6.960 ns        ; keypad[6] ; value[1] ;
; N/A   ; None              ; 6.781 ns        ; keypad[7] ; value[1] ;
; N/A   ; None              ; 6.680 ns        ; keypad[6] ; value[2] ;
; N/A   ; None              ; 6.626 ns        ; keypad[7] ; value[2] ;
; N/A   ; None              ; 5.810 ns        ; keypad[6] ; value[3] ;
; N/A   ; None              ; 5.664 ns        ; keypad[7] ; value[3] ;
; N/A   ; None              ; 5.663 ns        ; keypad[6] ; value[0] ;
+-------+-------------------+-----------------+-----------+----------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Sun Oct 05 09:32:47 2008
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off decoder -c decoder --timing_analysis_only
Info: Longest tpd from source pin "keypad[9]" to destination pin "value[0]" is 12.413 ns
    Info: 1: + IC(0.000 ns) + CELL(0.830 ns) = 0.830 ns; Loc. = PIN_AA13; Fanout = 5; PIN Node = 'keypad[9]'
    Info: 2: + IC(6.235 ns) + CELL(0.275 ns) = 7.340 ns; Loc. = LCCOMB_X33_Y35_N14; Fanout = 1; COMB Node = 'WideOr2~65'
    Info: 3: + IC(0.244 ns) + CELL(0.420 ns) = 8.004 ns; Loc. = LCCOMB_X33_Y35_N6; Fanout = 1; COMB Node = 'WideOr2~64'
    Info: 4: + IC(0.249 ns) + CELL(0.150 ns) = 8.403 ns; Loc. = LCCOMB_X33_Y35_N18; Fanout = 1; COMB Node = 'WideOr2~61'
    Info: 5: + IC(0.249 ns) + CELL(0.150 ns) = 8.802 ns; Loc. = LCCOMB_X33_Y35_N0; Fanout = 1; COMB Node = 'WideOr2'
    Info: 6: + IC(0.823 ns) + CELL(2.788 ns) = 12.413 ns; Loc. = PIN_B12; Fanout = 0; PIN Node = 'value[0]'
    Info: Total cell delay = 4.613 ns ( 37.16 % )
    Info: Total interconnect delay = 7.800 ns ( 62.84 % )
Info: Quartus II Timing Analyzer was successful. 0 errors, 0 warnings
    Info: Processing ended: Sun Oct 05 09:32:48 2008
    Info: Elapsed time: 00:00:02


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