📄 alarm_clock.tan.rpt
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; Total number of failed paths ; ; ; ; ; ; ; ; 20 ;
+------------------------------+------------------------------------------+---------------+------------------------------------------------+-------------------------------------------+-------------------------------------------------+------------+----------+--------------+
+------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Option ; Setting ; From ; To ; Entity Name ;
+-------------------------------------------------------+--------------------+------+----+-------------+
; Device Name ; EP2C35F672C6 ; ; ; ;
; Timing Models ; Final ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Default hold multicycle ; Same As Multicycle ; ; ; ;
; Cut paths between unrelated clock domains ; On ; ; ; ;
; Cut off read during write signal paths ; On ; ; ; ;
; Cut off feedback from I/O pins ; On ; ; ; ;
; Report Combined Fast/Slow Timing ; Off ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; On ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
+-------------------------------------------------------+--------------------+------+----+-------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clk ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
; key_down ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
; time_button ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
; alarm_button ; ; User Pin ; None ; 0.000 ns ; 0.000 ns ; -- ; N/A ; N/A ; N/A ; ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk' ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack ; Actual fmax (period) ; From ; To ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+-------------------------------------------------+-------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A ; 82.03 MHz ( period = 12.190 ns ) ; alarm_counter:u4|i_current_time[0][2]~512 ; alarm_counter:u4|i_current_time[2][3]~$emulated ; clk ; clk ; None ; None ; 4.057 ns ;
; N/A ; 82.90 MHz ( period = 12.062 ns ) ; alarm_counter:u4|i_current_time[0][2]~512 ; alarm_counter:u4|i_current_time[3][2]~$emulated ; clk ; clk ; None ; None ; 3.990 ns ;
; N/A ; 82.95 MHz ( period = 12.056 ns ) ; alarm_counter:u4|i_current_time[0][2]~512 ; alarm_counter:u4|i_current_time[3][1]~$emulated ; clk ; clk ; None ; None ; 3.987 ns ;
; N/A ; 82.95 MHz ( period = 12.056 ns ) ; alarm_counter:u4|i_current_time[0][2]~512 ; alarm_counter:u4|i_current_time[3][3]~$emulated ; clk ; clk ; None ; None ; 3.987 ns ;
; N/A ; 83.11 MHz ( period = 12.032 ns ) ; alarm_counter:u4|i_current_time[2][2]~600 ; alarm_counter:u4|i_current_time[3][3]~$emulated ; clk ; clk ; None ; None ; 3.978 ns ;
; N/A ; 83.32 MHz ( period = 12.002 ns ) ; alarm_counter:u4|i_current_time[0][0]~490 ; alarm_counter:u4|i_current_time[2][3]~$emulated ; clk ; clk ; None ; None ; 3.970 ns ;
; N/A ; 83.54 MHz ( period = 11.970 ns ) ; alarm_counter:u4|i_current_time[0][2]~512 ; alarm_counter:u4|i_current_time[3][0]~$emulated ; clk ; clk ; None ; None ; 3.945 ns ;
; N/A ; 83.67 MHz ( period = 11.952 ns ) ; alarm_counter:u4|i_current_time[2][1]~589 ; alarm_counter:u4|i_current_time[3][3]~$emulated ; clk ; clk ; None ; None ; 3.948 ns ;
; N/A ; 84.13 MHz ( period = 11.886 ns ) ; alarm_counter:u4|i_current_time[0][2]~512 ; alarm_counter:u4|i_current_time[2][0]~$emulated ; clk ; clk ; None ; None ; 3.904 ns ;
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