prev_cmp_dds.tan.qmsg

基于DDS原理的正弦信号发生器。用VERILOG语言实现

{ "Info" "ITDB_FULL_MIN_SLACK_RESULT" "altpll0:inst1\|altpll:altpll_component\|_clk0 register DDS:inst\|add\[11\] memory DDS:inst\|rom0:rom0_instant\|altsyncram:Ram0_rtl_0\|altsyncram_4m71:auto_generated\|ram_block1a2~porta_address_reg1 1.028 ns " "Info: Minimum slack time is 1.028 ns for clock \"altpll0:inst1\|altpll:altpll_component\|_clk0\" between source register \"DDS:inst\|add\[11\]\" and destination memory \"DDS:inst\|rom0:rom0_instant\|altsyncram:Ram0_rtl_0\|altsyncram_4m71:auto_generated\|ram_block1a2~porta_address_reg1\"" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "1.088 ns + Shortest register memory " "Info: + Shortest register to memory delay is 1.088 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns DDS:inst\|add\[11\] 1 REG LCFF_X12_Y5_N3 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X12_Y5_N3; Fanout = 5; REG Node = 'DDS:inst\|add\[11\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { DDS:inst|add[11] } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.912 ns) + CELL(0.176 ns) 1.088 ns DDS:inst\|rom0:rom0_instant\|altsyncram:Ram0_rtl_0\|altsyncram_4m71:auto_generated\|ram_block1a2~porta_address_reg1 2 MEM M4K_X13_Y5 4 " "Info: 2: + IC(0.912 ns) + CELL(0.176 ns) = 1.088 ns; Loc. = M4K_X13_Y5; Fanout = 4; MEM Node = 'DDS:inst\|rom0:rom0_instant\|altsyncram:Ram0_rtl_0\|altsyncram_4m71:auto_generated\|ram_block1a2~porta_address_reg1'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.088 ns" { DDS:inst|add[11] DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 } "NODE_NAME" } } { "db/altsyncram_4m71.tdf" "" { Text "E:/DDS/db/altsyncram_4m71.tdf" 74 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.176 ns ( 16.18 % ) " "Info: Total cell delay = 0.176 ns ( 16.18 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.912 ns ( 83.82 % ) " "Info: Total interconnect delay = 0.912 ns ( 83.82 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.088 ns" { DDS:inst|add[11] DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "1.088 ns" { DDS:inst|add[11] {} DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 {} } { 0.000ns 0.912ns } { 0.000ns 0.176ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_P2P_REQUIREMENT_RESULT" "0.060 ns - Smallest register memory " "Info: - Smallest register to memory requirement is 0.060 ns" { { "Info" "ITDB_FULL_HOLD_REQUIREMENT" "0.000 ns + " "Info: + Hold relationship between source and destination is 0.000 ns" { { "Info" "ITDB_EDGE_RESULT" "+ Latch -2.804 ns " "Info: + Latch edge is -2.804 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Destination altpll0:inst1\|altpll:altpll_component\|_clk0 5.000 ns -2.804 ns  50 " "Info: Clock period of Destination clock \"altpll0:inst1\|altpll:altpll_component\|_clk0\" is 5.000 ns with  offset of -2.804 ns and duty cycle of 50" {  } {  } 0 0 "Clock period of %1!s! clock \"%2!s!\" is %3!s! with %5!s! offset of %4!s! and duty cycle of %6!d!" 0 0 "" 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Destination Setup 1 " "Info: Multicycle Setup factor for Destination register is 1" {  } {  } 0 0 "Multicycle %2!s! factor for %1!s! register is %3!d!" 0 0 "" 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Destination Hold 1 " "Info: Multicycle Hold factor for Destination register is 1" {  } {  } 0 0 "Multicycle %2!s! factor for %1!s! register is %3!d!" 0 0 "" 0}  } {  } 0 0 "%1!s! %2!s! edge is %3!s!" 0 0 "" 0} { "Info" "ITDB_EDGE_RESULT" "- Launch -2.804 ns " "Info: - Launch edge is -2.804 ns" { { "Info" "ITDB_CLOCK_SETTING_RESULT" "Source altpll0:inst1\|altpll:altpll_component\|_clk0 5.000 ns -2.804 ns  50 " "Info: Clock period of Source clock \"altpll0:inst1\|altpll:altpll_component\|_clk0\" is 5.000 ns with  offset of -2.804 ns and duty cycle of 50" {  } {  } 0 0 "Clock period of %1!s! clock \"%2!s!\" is %3!s! with %5!s! offset of %4!s! and duty cycle of %6!d!" 0 0 "" 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Source Setup 1 " "Info: Multicycle Setup factor for Source register is 1" {  } {  } 0 0 "Multicycle %2!s! factor for %1!s! register is %3!d!" 0 0 "" 0} { "Info" "ITDB_MULTICYCLE_RESULT" "Source Hold 1 " "Info: Multicycle Hold factor for Source register is 1" {  } {  } 0 0 "Multicycle %2!s! factor for %1!s! register is %3!d!" 0 0 "" 0}  } {  } 0 0 "%1!s! %2!s! edge is %3!s!" 0 0 "" 0}  } {  } 0 0 "%2!c! Hold relationship between source and destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.097 ns + Smallest " "Info: + Smallest clock skew is 0.097 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altpll0:inst1\|altpll:altpll_component\|_clk0 destination 3.352 ns + Longest memory " "Info: + Longest clock path from clock \"altpll0:inst1\|altpll:altpll_component\|_clk0\" to destination memory is 3.352 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altpll0:inst1\|altpll:altpll_component\|_clk0 1 CLK PLL_1 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 2; CLK Node = 'altpll0:inst1\|altpll:altpll_component\|_clk0'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altpll0:inst1|altpll:altpll_component|_clk0 } "NODE_NAME" } } { "altpll.tdf" "" { Text "d:/altera/72/quartus/libraries/megafunctions/altpll.tdf" 895 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.382 ns) + CELL(0.000 ns) 1.382 ns altpll0:inst1\|altpll:altpll_component\|_clk0~clkctrl 2 COMB CLKCTRL_G2 51 " "Info: 2: + IC(1.382 ns) + CELL(0.000 ns) = 1.382 ns; Loc. = CLKCTRL_G2; Fanout = 51; COMB Node = 'altpll0:inst1\|altpll:altpll_component\|_clk0~clkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.382 ns" { altpll0:inst1|altpll:altpll_component|_clk0 altpll0:inst1|altpll:altpll_component|_clk0~clkctrl } "NODE_NAME" } } { "altpll.tdf" "" { Text "d:/altera/72/quartus/libraries/megafunctions/altpll.tdf" 895 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.135 ns) + CELL(0.835 ns) 3.352 ns DDS:inst\|rom0:rom0_instant\|altsyncram:Ram0_rtl_0\|altsyncram_4m71:auto_generated\|ram_block1a2~porta_address_reg1 3 MEM M4K_X13_Y5 4 " "Info: 3: + IC(1.135 ns) + CELL(0.835 ns) = 3.352 ns; Loc. = M4K_X13_Y5; Fanout = 4; MEM Node = 'DDS:inst\|rom0:rom0_instant\|altsyncram:Ram0_rtl_0\|altsyncram_4m71:auto_generated\|ram_block1a2~porta_address_reg1'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.970 ns" { altpll0:inst1|altpll:altpll_component|_clk0~clkctrl DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 } "NODE_NAME" } } { "db/altsyncram_4m71.tdf" "" { Text "E:/DDS/db/altsyncram_4m71.tdf" 74 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.835 ns ( 24.91 % ) " "Info: Total cell delay = 0.835 ns ( 24.91 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.517 ns ( 75.09 % ) " "Info: Total interconnect delay = 2.517 ns ( 75.09 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.352 ns" { altpll0:inst1|altpll:altpll_component|_clk0 altpll0:inst1|altpll:altpll_component|_clk0~clkctrl DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.352 ns" { altpll0:inst1|altpll:altpll_component|_clk0 {} altpll0:inst1|altpll:altpll_component|_clk0~clkctrl {} DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 {} } { 0.000ns 1.382ns 1.135ns } { 0.000ns 0.000ns 0.835ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altpll0:inst1\|altpll:altpll_component\|_clk0 source 3.255 ns - Shortest register " "Info: - Shortest clock path from clock \"altpll0:inst1\|altpll:altpll_component\|_clk0\" to source register is 3.255 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altpll0:inst1\|altpll:altpll_component\|_clk0 1 CLK PLL_1 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_1; Fanout = 2; CLK Node = 'altpll0:inst1\|altpll:altpll_component\|_clk0'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { altpll0:inst1|altpll:altpll_component|_clk0 } "NODE_NAME" } } { "altpll.tdf" "" { Text "d:/altera/72/quartus/libraries/megafunctions/altpll.tdf" 895 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.382 ns) + CELL(0.000 ns) 1.382 ns altpll0:inst1\|altpll:altpll_component\|_clk0~clkctrl 2 COMB CLKCTRL_G2 51 " "Info: 2: + IC(1.382 ns) + CELL(0.000 ns) = 1.382 ns; Loc. = CLKCTRL_G2; Fanout = 51; COMB Node = 'altpll0:inst1\|altpll:altpll_component\|_clk0~clkctrl'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.382 ns" { altpll0:inst1|altpll:altpll_component|_clk0 altpll0:inst1|altpll:altpll_component|_clk0~clkctrl } "NODE_NAME" } } { "altpll.tdf" "" { Text "d:/altera/72/quartus/libraries/megafunctions/altpll.tdf" 895 3 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.207 ns) + CELL(0.666 ns) 3.255 ns DDS:inst\|add\[11\] 3 REG LCFF_X12_Y5_N3 5 " "Info: 3: + IC(1.207 ns) + CELL(0.666 ns) = 3.255 ns; Loc. = LCFF_X12_Y5_N3; Fanout = 5; REG Node = 'DDS:inst\|add\[11\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.873 ns" { altpll0:inst1|altpll:altpll_component|_clk0~clkctrl DDS:inst|add[11] } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.666 ns ( 20.46 % ) " "Info: Total cell delay = 0.666 ns ( 20.46 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.589 ns ( 79.54 % ) " "Info: Total interconnect delay = 2.589 ns ( 79.54 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.255 ns" { altpll0:inst1|altpll:altpll_component|_clk0 altpll0:inst1|altpll:altpll_component|_clk0~clkctrl DDS:inst|add[11] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.255 ns" { altpll0:inst1|altpll:altpll_component|_clk0 {} altpll0:inst1|altpll:altpll_component|_clk0~clkctrl {} DDS:inst|add[11] {} } { 0.000ns 1.382ns 1.207ns } { 0.000ns 0.000ns 0.666ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.352 ns" { altpll0:inst1|altpll:altpll_component|_clk0 altpll0:inst1|altpll:altpll_component|_clk0~clkctrl DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.352 ns" { altpll0:inst1|altpll:altpll_component|_clk0 {} altpll0:inst1|altpll:altpll_component|_clk0~clkctrl {} DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 {} } { 0.000ns 1.382ns 1.135ns } { 0.000ns 0.000ns 0.835ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.255 ns" { altpll0:inst1|altpll:altpll_component|_clk0 altpll0:inst1|altpll:altpll_component|_clk0~clkctrl DDS:inst|add[11] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.255 ns" { altpll0:inst1|altpll:altpll_component|_clk0 {} altpll0:inst1|altpll:altpll_component|_clk0~clkctrl {} DDS:inst|add[11] {} } { 0.000ns 1.382ns 1.207ns } { 0.000ns 0.000ns 0.666ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns - " "Info: - Micro clock to output delay of source is 0.304 ns" {  } { { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TH_DELAY" "0.267 ns + " "Info: + Micro hold delay of destination is 0.267 ns" {  } { { "db/altsyncram_4m71.tdf" "" { Text "E:/DDS/db/altsyncram_4m71.tdf" 74 2 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.352 ns" { altpll0:inst1|altpll:altpll_component|_clk0 altpll0:inst1|altpll:altpll_component|_clk0~clkctrl DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.352 ns" { altpll0:inst1|altpll:altpll_component|_clk0 {} altpll0:inst1|altpll:altpll_component|_clk0~clkctrl {} DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 {} } { 0.000ns 1.382ns 1.135ns } { 0.000ns 0.000ns 0.835ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.255 ns" { altpll0:inst1|altpll:altpll_component|_clk0 altpll0:inst1|altpll:altpll_component|_clk0~clkctrl DDS:inst|add[11] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.255 ns" { altpll0:inst1|altpll:altpll_component|_clk0 {} altpll0:inst1|altpll:altpll_component|_clk0~clkctrl {} DDS:inst|add[11] {} } { 0.000ns 1.382ns 1.207ns } { 0.000ns 0.000ns 0.666ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! requirement is %1!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.088 ns" { DDS:inst|add[11] DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "1.088 ns" { DDS:inst|add[11] {} DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 {} } { 0.000ns 0.912ns } { 0.000ns 0.176ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.352 ns" { altpll0:inst1|altpll:altpll_component|_clk0 altpll0:inst1|altpll:altpll_component|_clk0~clkctrl DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.352 ns" { altpll0:inst1|altpll:altpll_component|_clk0 {} altpll0:inst1|altpll:altpll_component|_clk0~clkctrl {} DDS:inst|rom0:rom0_instant|altsyncram:Ram0_rtl_0|altsyncram_4m71:auto_generated|ram_block1a2~porta_address_reg1 {} } { 0.000ns 1.382ns 1.135ns } { 0.000ns 0.000ns 0.835ns } "" } } { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "3.255 ns" { altpll0:inst1|altpll:altpll_component|_clk0 altpll0:inst1|altpll:altpll_component|_clk0~clkctrl DDS:inst|add[11] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "3.255 ns" { altpll0:inst1|altpll:altpll_component|_clk0 {} altpll0:inst1|altpll:altpll_component|_clk0~clkctrl {} DDS:inst|add[11] {} } { 0.000ns 1.382ns 1.207ns } { 0.000ns 0.000ns 0.666ns } "" } }  } 0 0 "Minimum slack time is %6!s! for clock \"%1!s!\" between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\"" 0 0 "" 0}
{ "Info" "ITDB_TSU_RESULT" "DDS:inst\|add\[19\] freqword\[0\] clk 10.419 ns register " "Info: tsu for register \"DDS:inst\|add\[19\]\" (data pin = \"freqword\[0\]\", clock pin = \"clk\") is 10.419 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.910 ns + Longest pin register " "Info: + Longest pin to register delay is 10.910 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.924 ns) 0.924 ns freqword\[0\] 1 PIN PIN_U10 2 " "Info: 1: + IC(0.000 ns) + CELL(0.924 ns) = 0.924 ns; Loc. = PIN_U10; Fanout = 2; PIN Node = 'freqword\[0\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { freqword[0] } "NODE_NAME" } } { "DDDS.bdf" "" { Schematic "E:/DDS/DDDS.bdf" { { 64 112 280 80 "freqword\[19..0\]" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(6.931 ns) + CELL(0.596 ns) 8.451 ns DDS:inst\|add\[0\]~203 2 COMB LCCOMB_X12_Y6_N12 2 " "Info: 2: + IC(6.931 ns) + CELL(0.596 ns) = 8.451 ns; Loc. = LCCOMB_X12_Y6_N12; Fanout = 2; COMB Node = 'DDS:inst\|add\[0\]~203'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "7.527 ns" { freqword[0] DDS:inst|add[0]~203 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.190 ns) 8.641 ns DDS:inst\|add\[1\]~205 3 COMB LCCOMB_X12_Y6_N14 2 " "Info: 3: + IC(0.000 ns) + CELL(0.190 ns) = 8.641 ns; Loc. = LCCOMB_X12_Y6_N14; Fanout = 2; COMB Node = 'DDS:inst\|add\[1\]~205'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.190 ns" { DDS:inst|add[0]~203 DDS:inst|add[1]~205 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 8.727 ns DDS:inst\|add\[2\]~207 4 COMB LCCOMB_X12_Y6_N16 2 " "Info: 4: + IC(0.000 ns) + CELL(0.086 ns) = 8.727 ns; Loc. = LCCOMB_X12_Y6_N16; Fanout = 2; COMB Node = 'DDS:inst\|add\[2\]~207'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[1]~205 DDS:inst|add[2]~207 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 8.813 ns DDS:inst\|add\[3\]~209 5 COMB LCCOMB_X12_Y6_N18 2 " "Info: 5: + IC(0.000 ns) + CELL(0.086 ns) = 8.813 ns; Loc. = LCCOMB_X12_Y6_N18; Fanout = 2; COMB Node = 'DDS:inst\|add\[3\]~209'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[2]~207 DDS:inst|add[3]~209 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 8.899 ns DDS:inst\|add\[4\]~211 6 COMB LCCOMB_X12_Y6_N20 2 " "Info: 6: + IC(0.000 ns) + CELL(0.086 ns) = 8.899 ns; Loc. = LCCOMB_X12_Y6_N20; Fanout = 2; COMB Node = 'DDS:inst\|add\[4\]~211'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[3]~209 DDS:inst|add[4]~211 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 8.985 ns DDS:inst\|add\[5\]~213 7 COMB LCCOMB_X12_Y6_N22 2 " "Info: 7: + IC(0.000 ns) + CELL(0.086 ns) = 8.985 ns; Loc. = LCCOMB_X12_Y6_N22; Fanout = 2; COMB Node = 'DDS:inst\|add\[5\]~213'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[4]~211 DDS:inst|add[5]~213 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 9.071 ns DDS:inst\|add\[6\]~215 8 COMB LCCOMB_X12_Y6_N24 2 " "Info: 8: + IC(0.000 ns) + CELL(0.086 ns) = 9.071 ns; Loc. = LCCOMB_X12_Y6_N24; Fanout = 2; COMB Node = 'DDS:inst\|add\[6\]~215'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[5]~213 DDS:inst|add[6]~215 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 9.157 ns DDS:inst\|add\[7\]~217 9 COMB LCCOMB_X12_Y6_N26 2 " "Info: 9: + IC(0.000 ns) + CELL(0.086 ns) = 9.157 ns; Loc. = LCCOMB_X12_Y6_N26; Fanout = 2; COMB Node = 'DDS:inst\|add\[7\]~217'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[6]~215 DDS:inst|add[7]~217 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 9.243 ns DDS:inst\|add\[8\]~219 10 COMB LCCOMB_X12_Y6_N28 2 " "Info: 10: + IC(0.000 ns) + CELL(0.086 ns) = 9.243 ns; Loc. = LCCOMB_X12_Y6_N28; Fanout = 2; COMB Node = 'DDS:inst\|add\[8\]~219'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[7]~217 DDS:inst|add[8]~219 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.175 ns) 9.418 ns DDS:inst\|add\[9\]~221 11 COMB LCCOMB_X12_Y6_N30 2 " "Info: 11: + IC(0.000 ns) + CELL(0.175 ns) = 9.418 ns; Loc. = LCCOMB_X12_Y6_N30; Fanout = 2; COMB Node = 'DDS:inst\|add\[9\]~221'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.175 ns" { DDS:inst|add[8]~219 DDS:inst|add[9]~221 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 9.504 ns DDS:inst\|add\[10\]~223 12 COMB LCCOMB_X12_Y5_N0 2 " "Info: 12: + IC(0.000 ns) + CELL(0.086 ns) = 9.504 ns; Loc. = LCCOMB_X12_Y5_N0; Fanout = 2; COMB Node = 'DDS:inst\|add\[10\]~223'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[9]~221 DDS:inst|add[10]~223 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 9.590 ns DDS:inst\|add\[11\]~225 13 COMB LCCOMB_X12_Y5_N2 2 " "Info: 13: + IC(0.000 ns) + CELL(0.086 ns) = 9.590 ns; Loc. = LCCOMB_X12_Y5_N2; Fanout = 2; COMB Node = 'DDS:inst\|add\[11\]~225'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[10]~223 DDS:inst|add[11]~225 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 9.676 ns DDS:inst\|add\[12\]~227 14 COMB LCCOMB_X12_Y5_N4 2 " "Info: 14: + IC(0.000 ns) + CELL(0.086 ns) = 9.676 ns; Loc. = LCCOMB_X12_Y5_N4; Fanout = 2; COMB Node = 'DDS:inst\|add\[12\]~227'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[11]~225 DDS:inst|add[12]~227 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 9.762 ns DDS:inst\|add\[13\]~229 15 COMB LCCOMB_X12_Y5_N6 2 " "Info: 15: + IC(0.000 ns) + CELL(0.086 ns) = 9.762 ns; Loc. = LCCOMB_X12_Y5_N6; Fanout = 2; COMB Node = 'DDS:inst\|add\[13\]~229'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[12]~227 DDS:inst|add[13]~229 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 9.848 ns DDS:inst\|add\[14\]~231 16 COMB LCCOMB_X12_Y5_N8 2 " "Info: 16: + IC(0.000 ns) + CELL(0.086 ns) = 9.848 ns; Loc. = LCCOMB_X12_Y5_N8; Fanout = 2; COMB Node = 'DDS:inst\|add\[14\]~231'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[13]~229 DDS:inst|add[14]~231 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 9.934 ns DDS:inst\|add\[15\]~233 17 COMB LCCOMB_X12_Y5_N10 2 " "Info: 17: + IC(0.000 ns) + CELL(0.086 ns) = 9.934 ns; Loc. = LCCOMB_X12_Y5_N10; Fanout = 2; COMB Node = 'DDS:inst\|add\[15\]~233'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[14]~231 DDS:inst|add[15]~233 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 10.020 ns DDS:inst\|add\[16\]~235 18 COMB LCCOMB_X12_Y5_N12 2 " "Info: 18: + IC(0.000 ns) + CELL(0.086 ns) = 10.020 ns; Loc. = LCCOMB_X12_Y5_N12; Fanout = 2; COMB Node = 'DDS:inst\|add\[16\]~235'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[15]~233 DDS:inst|add[16]~235 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.190 ns) 10.210 ns DDS:inst\|add\[17\]~237 19 COMB LCCOMB_X12_Y5_N14 2 " "Info: 19: + IC(0.000 ns) + CELL(0.190 ns) = 10.210 ns; Loc. = LCCOMB_X12_Y5_N14; Fanout = 2; COMB Node = 'DDS:inst\|add\[17\]~237'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.190 ns" { DDS:inst|add[16]~235 DDS:inst|add[17]~237 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 10.296 ns DDS:inst\|add\[18\]~239 20 COMB LCCOMB_X12_Y5_N16 1 " "Info: 20: + IC(0.000 ns) + CELL(0.086 ns) = 10.296 ns; Loc. = LCCOMB_X12_Y5_N16; Fanout = 1; COMB Node = 'DDS:inst\|add\[18\]~239'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.086 ns" { DDS:inst|add[17]~237 DDS:inst|add[18]~239 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 10.802 ns DDS:inst\|add\[19\]~240 21 COMB LCCOMB_X12_Y5_N18 1 " "Info: 21: + IC(0.000 ns) + CELL(0.506 ns) = 10.802 ns; Loc. = LCCOMB_X12_Y5_N18; Fanout = 1; COMB Node = 'DDS:inst\|add\[19\]~240'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.506 ns" { DDS:inst|add[18]~239 DDS:inst|add[19]~240 } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 10.910 ns DDS:inst\|add\[19\] 22 REG LCFF_X12_Y5_N19 4 " "Info: 22: + IC(0.000 ns) + CELL(0.108 ns) = 10.910 ns; Loc. = LCFF_X12_Y5_N19; Fanout = 4; REG Node = 'DDS:inst\|add\[19\]'" {  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.108 ns" { DDS:inst|add[19]~240 DDS:inst|add[19] } "NODE_NAME" } } { "DDS.v" "" { Text "E:/DDS/DDS.v" 24 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.979 ns ( 36.47 % ) " "Info: Total cell delay = 3.979 ns ( 36.47 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.931 ns ( 63.53 % ) " "Info: Total interconnect delay = 6.931 ns ( 63.53 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "10.910 ns" { freqword[0] DDS:inst|add[0]~203 DDS:inst|add[1]~205 DDS:inst|add[2]~207 DDS:inst|add[3]~209 DDS:inst|add[4]~211 DDS:inst|add[5]~213 DDS:inst|add[6]~215 DDS:inst|add[7]~217 DDS:inst|add[8]~219 DDS:inst|add[9]~221 DDS:inst|add[10]~223 DDS:inst|add[11]~225 DDS:inst|add[12]~227 DDS:inst|add[13]~229 DDS:inst|add[14]~231 DDS:inst|add[15]~233 DDS:inst|add[16]~235 DDS:inst|add[17]~237 DDS:inst|add[18]~239 DDS:inst|add[19]~240 DDS:inst|add[19] } "NODE_NAME" } } { "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/72/quartus/bin/Technology_Viewer.qrui" "10.910 ns" { freqword[0] {} freqword[0]~combout {} DDS:inst|add[0]~203 {} DDS:inst|add[1]~205 {} DDS:inst|add[2]~207 {} DDS:inst|add[3]~209 {} DDS:inst|add[4]~211 {} DDS:inst|add[5]~213 {} DDS:inst|add[6]~215 {} DDS:inst|add[7]~217 {} DDS:inst|add[8]~219 {} DDS:inst|add[9]~221 {} DDS:inst|add[10]~223 {} DDS:inst|add[11]~225 {} DDS:inst|add[12]~227 {} DDS:inst|add[13]~229 {} DDS:inst|add[14]~231 {} DDS:inst|add[15]~233 {} DDS:inst|add[16]~235 {} DD