we.tan.summary

出血FPGA,用VHDL做的音乐盒

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 13.040 ns
From           : TONETABA:inst2|CODE[2]
To             : CODE[2]
From Clock     : CLK8Hz
To Clock       : --
Failed Paths   : 0

Type           : Clock Setup: 'CLK8Hz'
Slack          : N/A
Required Time  : None
Actual Time    : 290.87 MHz ( period = 3.438 ns )
From           : lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_f431:auto_generated|ram_block1a3~porta_address_reg7
To             : lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_f431:auto_generated|q_a[0]
From Clock     : CLK8Hz
To Clock       : CLK8Hz
Failed Paths   : 0

Type           : Clock Hold: 'CLK8Hz'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : lpm_rom0:inst|altsyncram:altsyncram_component|altsyncram_f431:auto_generated|q_a[3]
To             : TONETABA:inst2|HIGH
From Clock     : CLK8Hz
To Clock       : CLK8Hz
Failed Paths   : 10

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 10

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