prev_cmp_compare.tan.qmsg

基于CPLD的签到器的设计

{ "Info" "ITDB_TH_RESULT" "b1\[0\] clock_hour\[3\] button_arrive -2.032 ns register " "Info: th for register \"b1\[0\]\" (data pin = \"clock_hour\[3\]\", clock pin = \"button_arrive\") is -2.032 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "button_arrive destination 3.819 ns + Longest register " "Info: + Longest clock path from clock \"button_arrive\" to destination register is 3.819 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.163 ns) 1.163 ns button_arrive 1 CLK PIN_18 26 " "Info: 1: + IC(0.000 ns) + CELL(1.163 ns) = 1.163 ns; Loc. = PIN_18; Fanout = 26; CLK Node = 'button_arrive'" {  } { { "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" "" { button_arrive } "NODE_NAME" } } { "compare.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/数据处理模块/实时比较（7 days later judge）/compare.vhd" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.738 ns) + CELL(0.918 ns) 3.819 ns b1\[0\] 2 REG LC_X5_Y7_N3 11 " "Info: 2: + IC(1.738 ns) + CELL(0.918 ns) = 3.819 ns; Loc. = LC_X5_Y7_N3; Fanout = 11; REG Node = 'b1\[0\]'" {  } { { "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" "2.656 ns" { button_arrive b1[0] } "NODE_NAME" } } { "compare.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/数据处理模块/实时比较（7 days later judge）/compare.vhd" 46 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.081 ns ( 54.49 % ) " "Info: Total cell delay = 2.081 ns ( 54.49 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.738 ns ( 45.51 % ) " "Info: Total interconnect delay = 1.738 ns ( 45.51 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" "3.819 ns" { button_arrive b1[0] } "NODE_NAME" } } { "e:/study/cpld1/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/study/cpld1/quartus/bin/Technology_Viewer.qrui" "3.819 ns" { button_arrive {} button_arrive~combout {} b1[0] {} } { 0.000ns 0.000ns 1.738ns } { 0.000ns 1.163ns 0.918ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TH_DELAY" "0.221 ns + " "Info: + Micro hold delay of destination is 0.221 ns" {  } { { "compare.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/数据处理模块/实时比较（7 days later judge）/compare.vhd" 46 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.072 ns - Shortest pin register " "Info: - Shortest pin to register delay is 6.072 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.132 ns) 1.132 ns clock_hour\[3\] 1 PIN PIN_43 4 " "Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_43; Fanout = 4; PIN Node = 'clock_hour\[3\]'" {  } { { "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" "" { clock_hour[3] } "NODE_NAME" } } { "compare.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/数据处理模块/实时比较（7 days later judge）/compare.vhd" 10 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(3.879 ns) + CELL(1.061 ns) 6.072 ns b1\[0\] 2 REG LC_X5_Y7_N3 11 " "Info: 2: + IC(3.879 ns) + CELL(1.061 ns) = 6.072 ns; Loc. = LC_X5_Y7_N3; Fanout = 11; REG Node = 'b1\[0\]'" {  } { { "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" "4.940 ns" { clock_hour[3] b1[0] } "NODE_NAME" } } { "compare.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/数据处理模块/实时比较（7 days later judge）/compare.vhd" 46 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.193 ns ( 36.12 % ) " "Info: Total cell delay = 2.193 ns ( 36.12 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.879 ns ( 63.88 % ) " "Info: Total interconnect delay = 3.879 ns ( 63.88 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" "6.072 ns" { clock_hour[3] b1[0] } "NODE_NAME" } } { "e:/study/cpld1/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/study/cpld1/quartus/bin/Technology_Viewer.qrui" "6.072 ns" { clock_hour[3] {} clock_hour[3]~combout {} b1[0] {} } { 0.000ns 0.000ns 3.879ns } { 0.000ns 1.132ns 1.061ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0}  } { { "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" "3.819 ns" { button_arrive b1[0] } "NODE_NAME" } } { "e:/study/cpld1/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/study/cpld1/quartus/bin/Technology_Viewer.qrui" "3.819 ns" { button_arrive {} button_arrive~combout {} b1[0] {} } { 0.000ns 0.000ns 1.738ns } { 0.000ns 1.163ns 0.918ns } "" } } { "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" "6.072 ns" { clock_hour[3] b1[0] } "NODE_NAME" } } { "e:/study/cpld1/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "e:/study/cpld1/quartus/bin/Technology_Viewer.qrui" "6.072 ns" { clock_hour[3] {} clock_hour[3]~combout {} b1[0] {} } { 0.000ns 0.000ns 3.879ns } { 0.000ns 1.132ns 1.061ns } "" } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "131 " "Info: Allocated 131 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Sat Aug 02 09:46:19 2008 " "Info: Processing ended: Sat Aug 02 09:46:19 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}