compare.fit.qmsg

基于CPLD的签到器的设计

{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0 "" 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "14.262 ns register register " "Info: Estimated most critical path is register to register delay of 14.262 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns b1\[1\] 1 REG LAB_X5_Y7 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X5_Y7; Fanout = 11; REG Node = 'b1\[1\]'" {  } { { "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" "" { b1[1] } "NODE_NAME" } } { "compare.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/数据处理模块/实时比较（7 days later judge）/compare.vhd" 46 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(2.278 ns) + CELL(0.200 ns) 2.478 ns Mux15~293 2 COMB LAB_X6_Y8 6 " "Info: 2: + IC(2.278 ns) + CELL(0.200 ns) = 2.478 ns; Loc. = LAB_X6_Y8; Fanout = 6; COMB Node = 'Mux15~293'" {  } { { "e:/study/cpld1/quartus/bin/TimingClosureFloorplan.fld" "" { Floo