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📄 prev_cmp_yima.map.qmsg

📁 基于CPLD的签到器的设计
💻 QMSG
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version " "Info: Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Aug 02 10:30:32 2008 " "Info: Processing started: Sat Aug 02 10:30:32 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off yima -c yima " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off yima -c yima" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../../显示模块1/lcdcont/change4_8.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ../../显示模块1/lcdcont/change4_8.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 change4_8-a " "Info: Found design unit 1: change4_8-a" {  } { { "../../显示模块1/lcdcont/change4_8.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/显示模块1/lcdcont/change4_8.vhd" 7 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 change4_8 " "Info: Found entity 1: change4_8" {  } { { "../../显示模块1/lcdcont/change4_8.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/显示模块1/lcdcont/change4_8.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../yima.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ../yima.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 yima-a " "Info: Found design unit 1: yima-a" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 14 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 yima " "Info: Found entity 1: yima" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "yima " "Info: Elaborating entity \"yima\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "lat yima.vhd(158) " "Warning (10492): VHDL Process Statement warning at yima.vhd(158): signal \"lat\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 158 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "abs1 yima.vhd(163) " "Warning (10492): VHDL Process Statement warning at yima.vhd(163): signal \"abs1\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 163 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "mark yima.vhd(169) " "Warning (10492): VHDL Process Statement warning at yima.vhd(169): signal \"mark\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 169 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_16 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_16\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_17 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_17\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_18 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_18\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_19 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_19\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_20 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_20\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_21 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_21\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_22 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_22\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_23 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_23\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_24 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_24\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_25 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_25\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_26 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_26\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_27 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_27\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "box_28 yima.vhd(28) " "Warning (10631): VHDL Process Statement warning at yima.vhd(28): inferring latch(es) for signal or variable \"box_28\", which holds its previous value in one or more paths through the process" {  } { { "../yima.vhd" "" { Text "E:/study/CPLD/竞赛用签到器/lcd显示模块(24脚)/yima.vhd" 28 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0 "" 0}

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