colorbar.bdf

基于EPM1270的VGA显示器接口源码Verilog

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic       
functions, and any output files any of the foregoing           
(including device programming or simulation files), and any    
associated documentation or information are expressly subject  
to the terms and conditions of the Altera Program License      
Subscription Agreement, Altera MegaCore Function License       
Agreement, or other applicable license agreement, including,   
without limitation, that your use is for the sole purpose of   
programming logic devices manufactured by Altera and sold by   
Altera or its authorized distributors.  Please refer to the    
applicable agreement for further details.
*/
(header "graphic" (version "1.3"))
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	(rect 104 24 272 40)
	(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
	(text "clk" (rect 5 0 19 12)(font "Arial" ))
	(pt 168 8)
	(drawing
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		(line (pt 92 4)(pt 117 4)(line_width 1))
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		(line (pt 117 4)(pt 121 8)(line_width 1))
		(line (pt 117 12)(pt 121 8)(line_width 1))
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	(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
	(annotation_block (location)(rect 16 40 104 72))
)
(pin
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	(rect 104 240 272 256)
	(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
	(text "rst" (rect 5 0 17 12)(font "Arial" ))
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	(annotation_block (location)(rect 8 256 104 288))
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(pin
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	(rect 608 240 784 256)
	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
	(text "VGA_HS" (rect 90 0 133 12)(font "Arial" ))
	(pt 0 8)
	(drawing
		(line (pt 0 8)(pt 52 8)(line_width 1))
		(line (pt 52 4)(pt 78 4)(line_width 1))
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	(annotation_block (location)(rect 784 256 872 288))
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	(rect 608 288 784 304)
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	(annotation_block (location)(rect 784 304 872 360))
)
(symbol
	(rect 344 216 480 344)
	(text "vga_vl" (rect 5 0 39 12)(font "Arial" ))
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	(port
		(pt 0 32)
		(input)
		(text "resetn" (rect 0 0 30 12)(font "Arial" ))
		(text "resetn" (rect 21 27 51 39)(font "Arial" ))
		(line (pt 0 32)(pt 16 32)(line_width 1))
	)
	(port
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		(input)
		(text "clock" (rect 0 0 25 12)(font "Arial" ))
		(text "clock" (rect 21 43 46 55)(font "Arial" ))
		(line (pt 0 48)(pt 16 48)(line_width 1))
	)
	(port
		(pt 0 64)
		(input)
		(text "orient" (rect 0 0 27 12)(font "Arial" ))
		(text "orient" (rect 21 59 48 71)(font "Arial" ))
		(line (pt 0 64)(pt 16 64)(line_width 1))
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	(port
		(pt 136 32)
		(output)
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		(text "hsync" (rect 85 27 115 39)(font "Arial" ))
		(line (pt 136 32)(pt 120 32)(line_width 1))
	)
	(port
		(pt 136 48)
		(output)
		(text "vsync" (rect 0 0 31 12)(font "Arial" ))
		(text "vsync" (rect 84 43 115 55)(font "Arial" ))
		(line (pt 136 48)(pt 120 48)(line_width 1))
	)
	(port
		(pt 136 64)
		(output)
		(text "blank" (rect 0 0 25 12)(font "Arial" ))
		(text "blank" (rect 90 59 115 71)(font "Arial" ))
		(line (pt 136 64)(pt 120 64)(line_width 1))
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	(port
		(pt 136 80)
		(output)
		(text "pixel[2..0]" (rect 0 0 48 12)(font "Arial" ))
		(text "pixel[2..0]" (rect 67 75 115 87)(font "Arial" ))
		(line (pt 136 80)(pt 120 80)(line_width 3))
	)
	(parameter
		"H_PIXELS"
		"32'b00000000000000000000001100100110"
		""
	)
	(parameter
		"H_FRONTPORCH"
		"32'b00000000000000000000000000100101"
		""
	)
	(parameter
		"H_SYNCTIME"
		"32'b00000000000000000000000010000000"
		""
	)
	(parameter
		"H_BACKPORCH"
		"32'b00000000000000000000000001010101"
		""
	)
	(parameter
		"H_SYNCSTART"
		"32'b00000000000000000000001101001011"
		""
	)
	(parameter
		"H_SYNCEND"
		"32'b00000000000000000000001111001011"
		""
	)
	(parameter
		"H_PERIOD"
		"32'b00000000000000000000010000100000"
		""
	)
	(parameter
		"V_LINES"
		"32'b00000000000000000000001001011100"
		""
	)
	(parameter
		"V_FRONTPORCH"
		"-1"
		""
	)
	(parameter
		"V_SYNCTIME"
		"32'b00000000000000000000000000000100"
		""
	)
	(parameter
		"V_BACKPORCH"
		"32'b00000000000000000000000000010101"
		""
	)
	(parameter
		"V_SYNCSTART"
		"32'b00000000000000000000001001011011"
		""
	)
	(parameter
		"V_SYNCEND"
		"32'b00000000000000000000001001011111"
		""
	)
	(parameter
		"V_PERIOD"
		"32'b00000000000000000000001001110100"
		""
	)
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	)
	(annotation_block (parameter)(rect 480 0 784 216))
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		(output)
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(connector
	(pt 480 248)
	(pt 608 248)
)
(connector
	(pt 480 264)
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)
(connector
	(pt 480 296)
	(pt 608 296)
	(bus)
)
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