ps2tolcd.map.qmsg

基于EPM1270的PS2键盘鼠标驱动源码Verilog

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat Feb 18 15:13:34 2006 " "Info: Processing started: Sat Feb 18 15:13:34 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off ps2tolcd -c ps2tolcd " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ps2tolcd -c ps2tolcd" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../SRC/DIV16.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../SRC/DIV16.v" { { "Info" "ISGN_ENTITY_NAME" "1 div16 " "Info: Found entity 1: div16" {  } { { "../SRC/DIV16.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/DIV16.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../SRC/div_256.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../SRC/div_256.v" { { "Info" "ISGN_ENTITY_NAME" "1 div_256 " "Info: Found entity 1: div_256" {  } { { "../SRC/div_256.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/div_256.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../SRC/lcd.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../SRC/lcd.v" { { "Info" "ISGN_ENTITY_NAME" "1 lcd " "Info: Found entity 1: lcd" {  } { { "../SRC/lcd.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/lcd.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../SRC/ps2_keyboard.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../SRC/ps2_keyboard.v" { { "Info" "ISGN_ENTITY_NAME" "1 ps2_keyboard_interface " "Info: Found entity 1: ps2_keyboard_interface" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 123 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ps2tolcd.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ps2tolcd.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 ps2tolcd " "Info: Found entity 1: ps2tolcd" {  } { { "ps2tolcd.bdf" "" { Schematic "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/PROJ/ps2tolcd.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "ps2tolcd " "Info: Elaborating entity \"ps2tolcd\" for the top level hierarchy" {  } {  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "rx_read ps2_keyboard_interface inst3 " "Warning: Port \"rx_read\" of type ps2_keyboard_interface and instance \"inst3\" is missing source signal" {  } { { "ps2tolcd.bdf" "" { Schematic "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/PROJ/ps2tolcd.bdf" { { 240 320 568 464 "inst3" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "tx_write ps2_keyboard_interface inst3 " "Warning: Port \"tx_write\" of type ps2_keyboard_interface and instance \"inst3\" is missing source signal" {  } { { "ps2tolcd.bdf" "" { Schematic "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/PROJ/ps2tolcd.bdf" { { 240 320 568 464 "inst3" "" } } } }  } 0}
{ "Warning" "WGDFX_NO_SOURCE_FOR_PORT" "tx_data ps2_keyboard_interface inst3 " "Warning: Port \"tx_data\" of type ps2_keyboard_interface and instance \"inst3\" is missing source signal" {  } { { "ps2tolcd.bdf" "" { Schematic "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/PROJ/ps2tolcd.bdf" { { 240 320 568 464 "inst3" "" } } } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ps2_keyboard_interface ps2_keyboard_interface:inst3 " "Info: Elaborating entity \"ps2_keyboard_interface\" for hierarchy \"ps2_keyboard_interface:inst3\"" {  } { { "ps2tolcd.bdf" "inst3" { Schematic "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/PROJ/ps2tolcd.bdf" { { 240 320 568 464 "inst3" "" } } } }  } 0}
{ "Info" "IVRFX_VRFC_OBJECT_DECLARED_NOT_USED" "shift_key_on ps2_keyboard.v(211) " "Info: (10035) Verilog HDL or VHDL information at ps2_keyboard.v(211): object \"shift_key_on\" declared but not used" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 211 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(283) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(283): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 283 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(284) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(284): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 284 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(285) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(285): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 285 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(286) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(286): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 286 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(287) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(287): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 287 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(293) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(293): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 293 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(301) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(301): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 301 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(307) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(307): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 307 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(314) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(314): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 314 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(322) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(322): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 322 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 ps2_keyboard.v(328) " "Warning: Verilog HDL assignment warning at ps2_keyboard.v(328): truncated value with size 32 to match size of target (1)" {  } { { "../SRC/ps2_keyboard.v" "" { Text "E:/Cindy/DevelopBoard/EDA主板/max1270/示例程序/veriloge/接口实验/PS2/SRC/ps2_keyboard.v" 328 0 0 } }  } 0}