a8254.hier_info

自己编写的8254计数器／计时器

cnt_choice[1] => Mux143.IN1
cnt_choice[1] => Mux142.IN1
cnt_choice[1] => Mux141.IN1
cnt_choice[1] => Mux140.IN1
cnt_choice[1] => Mux139.IN1
cnt_choice[1] => Mux138.IN1
cnt_choice[1] => Mux137.IN1
cnt_choice[1] => Mux136.IN1
cnt_choice[1] => Mux135.IN1
cnt_choice[1] => Mux134.IN1
cnt_choice[1] => Mux133.IN1
cnt_choice[1] => Mux132.IN1
cnt_choice[1] => Mux131.IN1
cnt_choice[1] => Mux130.IN1
cnt_choice[1] => Mux129.IN1
cnt_choice[1] => Mux128.IN1
cnt_choice[1] => Mux127.IN1
cnt_choice[1] => Mux126.IN1
cnt_choice[1] => Mux125.IN1
cnt_choice[1] => Mux124.IN1
cnt_choice[1] => Mux123.IN1
cnt_choice[1] => Mux122.IN1
cnt_choice[1] => Mux121.IN1
cnt_choice[1] => Mux120.IN1
cnt_choice[1] => Mux119.IN1
cnt_choice[1] => Mux118.IN1
cnt_choice[1] => Mux117.IN1
cnt_choice[1] => Mux116.IN1
cnt_choice[1] => Mux115.IN1
cnt_choice[1] => Mux114.IN1
cnt_choice[1] => Mux113.IN1
cnt_choice[1] => Mux112.IN1
cnt_choice[1] => Mux111.IN1
cnt_choice[1] => Mux110.IN1
cnt_choice[1] => Mux109.IN1
cnt_choice[1] => Mux108.IN1
cnt_choice[1] => Mux107.IN1
cnt_choice[1] => Mux106.IN1
cnt_choice[1] => Mux105.IN1
cnt_choice[1] => Mux104.IN1
cnt_choice[1] => Mux103.IN1
cnt_choice[1] => Mux102.IN1
cnt_choice[1] => Mux101.IN1
cnt_choice[1] => Mux100.IN1
cnt_choice[1] => Mux99.IN1
cnt_choice[1] => Mux98.IN1
binnbcd => ~NO_FANOUT~
gate[0] => gat.DATAIN
gate[0] => gatt~1.IN1
gate[0] => cnt_prc~9.IN0
gate[0] => cnt_prc~8.IN0
gate[0] => cnt_prc~7.IN1
gate[0] => cnt_prc~6.IN0
gate[0] => cnt_prc~5.IN0
gate[0] => cnt_prc~4.IN0
gate[0] => cnt_prc~3.IN0
gate[0] => cnt_prc~2.IN0
gate[0] => gatt~0.IN1
gate[1] => ~NO_FANOUT~
gate[2] => ~NO_FANOUT~
clk => out_sgnl[1]~reg0.CLK
clk => out_sgnl[0]~reg0.CLK
clk => i[31].CLK
clk => i[30].CLK
clk => i[29].CLK
clk => i[28].CLK
clk => i[27].CLK
clk => i[26].CLK
clk => i[25].CLK
clk => i[24].CLK
clk => i[23].CLK
clk => i[22].CLK
clk => i[21].CLK
clk => i[20].CLK
clk => i[19].CLK
clk => i[18].CLK
clk => i[17].CLK
clk => i[16].CLK
clk => i[15].CLK
clk => i[14].CLK
clk => i[13].CLK
clk => i[12].CLK
clk => i[11].CLK
clk => i[10].CLK
clk => i[9].CLK
clk => i[8].CLK
clk => i[7].CLK
clk => i[6].CLK
clk => i[5].CLK
clk => i[4].CLK
clk => i[3].CLK
clk => i[2].CLK
clk => i[1].CLK
clk => i[0].CLK
clk => cee[31].CLK
clk => cee[30].CLK
clk => cee[29].CLK
clk => cee[28].CLK
clk => cee[27].CLK
clk => cee[26].CLK
clk => cee[25].CLK
clk => cee[24].CLK
clk => cee[23].CLK
clk => cee[22].CLK
clk => cee[21].CLK
clk => cee[20].CLK
clk => cee[19].CLK
clk => cee[18].CLK
clk => cee[17].CLK
clk => cee[16].CLK
clk => cee[15].CLK
clk => cee[14].CLK
clk => cee[13].CLK
clk => cee[12].CLK
clk => cee[11].CLK
clk => cee[10].CLK
clk => cee[9].CLK
clk => cee[8].CLK
clk => cee[7].CLK
clk => cee[6].CLK
clk => cee[5].CLK
clk => cee[4].CLK
clk => cee[3].CLK
clk => cee[2].CLK
clk => cee[1].CLK
clk => cee[0].CLK
clk => j[31].CLK
clk => j[30].CLK
clk => j[29].CLK
clk => j[28].CLK
clk => j[27].CLK
clk => j[26].CLK
clk => j[25].CLK
clk => j[24].CLK
clk => j[23].CLK
clk => j[22].CLK
clk => j[21].CLK
clk => j[20].CLK
clk => j[19].CLK
clk => j[18].CLK
clk => j[17].CLK
clk => j[16].CLK
clk => j[15].CLK
clk => j[14].CLK
clk => j[13].CLK
clk => j[12].CLK
clk => j[11].CLK
clk => j[10].CLK
clk => j[9].CLK
clk => j[8].CLK
clk => j[7].CLK
clk => j[6].CLK
clk => j[5].CLK
clk => j[4].CLK
clk => j[3].CLK
clk => j[2].CLK
clk => j[1].CLK
clk => j[0].CLK
clk => gat.CLK
clk => gate_t.CLK
mode0_start => ~NO_FANOUT~
mode1_start => ~NO_FANOUT~
mode2_start => ~NO_FANOUT~
mode3_start => ~NO_FANOUT~
mode4_start => ~NO_FANOUT~
mode5_start => ~NO_FANOUT~
CE_0[0] => Mux63.IN2
CE_0[0] => Mux63.IN3
CE_0[0] => Mux63.IN4
CE_0[0] => LessThan6.IN32
CE_0[0] => Equal3.IN31
CE_0[0] => LessThan5.IN32
CE_0[0] => LessThan4.IN32
CE_0[0] => Equal2.IN31
CE_0[0] => i~481.DATAB
CE_0[0] => Add2.IN32
CE_0[0] => i~240.DATAB
CE_0[0] => LessThan1.IN32
CE_0[0] => Equal0.IN31
CE_0[0] => LessThan0.IN32
CE_0[0] => i~63.DATAB
CE_0[0] => i~15.DATAB
CE_0[0] => j~223.OUTPUTSELECT
CE_0[0] => j~222.OUTPUTSELECT
CE_0[0] => j~221.OUTPUTSELECT
CE_0[0] => j~220.OUTPUTSELECT
CE_0[0] => j~219.OUTPUTSELECT
CE_0[0] => j~218.OUTPUTSELECT
CE_0[0] => j~217.OUTPUTSELECT
CE_0[0] => j~216.OUTPUTSELECT
CE_0[0] => j~215.OUTPUTSELECT
CE_0[0] => j~214.OUTPUTSELECT
CE_0[0] => j~213.OUTPUTSELECT
CE_0[0] => j~212.OUTPUTSELECT
CE_0[0] => j~211.OUTPUTSELECT
CE_0[0] => j~210.OUTPUTSELECT
CE_0[0] => j~209.OUTPUTSELECT
CE_0[0] => j~208.OUTPUTSELECT
CE_0[0] => j~207.OUTPUTSELECT
CE_0[0] => j~206.OUTPUTSELECT
CE_0[0] => j~205.OUTPUTSELECT
CE_0[0] => j~204.OUTPUTSELECT
CE_0[0] => j~203.OUTPUTSELECT
CE_0[0] => j~202.OUTPUTSELECT
CE_0[0] => j~201.OUTPUTSELECT
CE_0[0] => j~200.OUTPUTSELECT
CE_0[0] => j~199.OUTPUTSELECT
CE_0[0] => j~198.OUTPUTSELECT
CE_0[0] => j~197.OUTPUTSELECT
CE_0[0] => j~196.OUTPUTSELECT
CE_0[0] => j~195.OUTPUTSELECT
CE_0[0] => j~194.OUTPUTSELECT
CE_0[0] => j~193.OUTPUTSELECT
CE_0[0] => j~192.OUTPUTSELECT
CE_0[0] => out_sgnl~9.OUTPUTSELECT
CE_0[0] => i~417.OUTPUTSELECT
CE_0[0] => i~416.OUTPUTSELECT
CE_0[0] => i~415.OUTPUTSELECT
CE_0[0] => i~414.OUTPUTSELECT
CE_0[0] => i~413.OUTPUTSELECT
CE_0[0] => i~412.OUTPUTSELECT
CE_0[0] => i~411.OUTPUTSELECT
CE_0[0] => i~410.OUTPUTSELECT
CE_0[0] => i~409.OUTPUTSELECT
CE_0[0] => i~408.OUTPUTSELECT
CE_0[0] => i~407.OUTPUTSELECT
CE_0[0] => i~406.OUTPUTSELECT
CE_0[0] => i~405.OUTPUTSELECT
CE_0[0] => i~404.OUTPUTSELECT
CE_0[0] => i~403.OUTPUTSELECT
CE_0[0] => i~402.OUTPUTSELECT
CE_0[0] => i~401.OUTPUTSELECT
CE_0[0] => i~400.OUTPUTSELECT
CE_0[0] => i~399.OUTPUTSELECT
CE_0[0] => i~398.OUTPUTSELECT
CE_0[0] => i~397.OUTPUTSELECT
CE_0[0] => i~396.OUTPUTSELECT
CE_0[0] => i~395.OUTPUTSELECT
CE_0[0] => i~394.OUTPUTSELECT
CE_0[0] => i~393.OUTPUTSELECT
CE_0[0] => i~392.OUTPUTSELECT
CE_0[0] => i~391.OUTPUTSELECT
CE_0[0] => i~390.OUTPUTSELECT
CE_0[0] => i~389.OUTPUTSELECT
CE_0[0] => i~388.OUTPUTSELECT
CE_0[0] => i~387.OUTPUTSELECT
CE_0[0] => i~386.OUTPUTSELECT
CE_0[1] => Mux62.IN2
CE_0[1] => Mux62.IN3
CE_0[1] => Mux62.IN4
CE_0[1] => Add4.IN30
CE_0[1] => LessThan4.IN31
CE_0[1] => Equal2.IN30
CE_0[1] => i~480.DATAB
CE_0[1] => Add2.IN31
CE_0[1] => LessThan1.IN31
CE_0[1] => Equal0.IN30
CE_0[1] => LessThan0.IN31
CE_0[1] => i~62.DATAB
CE_0[1] => i~14.DATAB
CE_0[2] => Mux61.IN2
CE_0[2] => Mux61.IN3
CE_0[2] => Mux61.IN4
CE_0[2] => Add4.IN29
CE_0[2] => LessThan4.IN30
CE_0[2] => Equal2.IN29
CE_0[2] => i~479.DATAB
CE_0[2] => Add2.IN30
CE_0[2] => LessThan1.IN30
CE_0[2] => Equal0.IN29
CE_0[2] => LessThan0.IN30
CE_0[2] => i~61.DATAB
CE_0[2] => i~13.DATAB
CE_0[3] => Mux60.IN2
CE_0[3] => Mux60.IN3
CE_0[3] => Mux60.IN4
CE_0[3] => Add4.IN28
CE_0[3] => LessThan4.IN29
CE_0[3] => Equal2.IN28
CE_0[3] => i~478.DATAB
CE_0[3] => Add2.IN29
CE_0[3] => LessThan1.IN29
CE_0[3] => Equal0.IN28
CE_0[3] => LessThan0.IN29
CE_0[3] => i~60.DATAB
CE_0[3] => i~12.DATAB
CE_0[4] => Mux59.IN2
CE_0[4] => Mux59.IN3
CE_0[4] => Mux59.IN4
CE_0[4] => Add4.IN27
CE_0[4] => LessThan4.IN28
CE_0[4] => Equal2.IN27
CE_0[4] => i~477.DATAB
CE_0[4] => Add2.IN28
CE_0[4] => LessThan1.IN28
CE_0[4] => Equal0.IN27
CE_0[4] => LessThan0.IN28
CE_0[4] => i~59.DATAB
CE_0[4] => i~11.DATAB
CE_0[5] => Mux58.IN2
CE_0[5] => Mux58.IN3
CE_0[5] => Mux58.IN4
CE_0[5] => Add4.IN26
CE_0[5] => LessThan4.IN27
CE_0[5] => Equal2.IN26
CE_0[5] => i~476.DATAB
CE_0[5] => Add2.IN27
CE_0[5] => LessThan1.IN27
CE_0[5] => Equal0.IN26
CE_0[5] => LessThan0.IN27
CE_0[5] => i~58.DATAB
CE_0[5] => i~10.DATAB
CE_0[6] => Mux57.IN2
CE_0[6] => Mux57.IN3
CE_0[6] => Mux57.IN4
CE_0[6] => Add4.IN25
CE_0[6] => LessThan4.IN26
CE_0[6] => Equal2.IN25
CE_0[6] => i~475.DATAB
CE_0[6] => Add2.IN26
CE_0[6] => LessThan1.IN26
CE_0[6] => Equal0.IN25
CE_0[6] => LessThan0.IN26
CE_0[6] => i~57.DATAB
CE_0[6] => i~9.DATAB
CE_0[7] => Mux56.IN2
CE_0[7] => Mux56.IN3
CE_0[7] => Mux56.IN4
CE_0[7] => Add4.IN24
CE_0[7] => LessThan4.IN25
CE_0[7] => Equal2.IN24
CE_0[7] => i~474.DATAB
CE_0[7] => Add2.IN25
CE_0[7] => LessThan1.IN25
CE_0[7] => Equal0.IN24
CE_0[7] => LessThan0.IN25
CE_0[7] => i~56.DATAB
CE_0[7] => i~8.DATAB
CE_0[8] => Mux55.IN2
CE_0[8] => Mux55.IN3
CE_0[8] => Mux55.IN4
CE_0[8] => Add4.IN23
CE_0[8] => LessThan4.IN24
CE_0[8] => Equal2.IN23
CE_0[8] => i~473.DATAB
CE_0[8] => Add2.IN24
CE_0[8] => LessThan1.IN24
CE_0[8] => Equal0.IN23
CE_0[8] => LessThan0.IN24
CE_0[8] => i~55.DATAB
CE_0[8] => i~7.DATAB
CE_0[9] => Mux54.IN2
CE_0[9] => Mux54.IN3
CE_0[9] => Mux54.IN4
CE_0[9] => Add4.IN22
CE_0[9] => LessThan4.IN23
CE_0[9] => Equal2.IN22
CE_0[9] => i~472.DATAB
CE_0[9] => Add2.IN23
CE_0[9] => LessThan1.IN23
CE_0[9] => Equal0.IN22
CE_0[9] => LessThan0.IN23
CE_0[9] => i~54.DATAB
CE_0[9] => i~6.DATAB
CE_0[10] => Mux53.IN2
CE_0[10] => Mux53.IN3
CE_0[10] => Mux53.IN4
CE_0[10] => Add4.IN21
CE_0[10] => LessThan4.IN22
CE_0[10] => Equal2.IN21
CE_0[10] => i~471.DATAB
CE_0[10] => Add2.IN22
CE_0[10] => LessThan1.IN22
CE_0[10] => Equal0.IN21
CE_0[10] => LessThan0.IN22
CE_0[10] => i~53.DATAB
CE_0[10] => i~5.DATAB
CE_0[11] => Mux52.IN2
CE_0[11] => Mux52.IN3
CE_0[11] => Mux52.IN4
CE_0[11] => Add4.IN20
CE_0[11] => LessThan4.IN21
CE_0[11] => Equal2.IN20
CE_0[11] => i~470.DATAB
CE_0[11] => Add2.IN21
CE_0[11] => LessThan1.IN21
CE_0[11] => Equal0.IN20
CE_0[11] => LessThan0.IN21
CE_0[11] => i~52.DATAB
CE_0[11] => i~4.DATAB
CE_0[12] => Mux51.IN2
CE_0[12] => Mux51.IN3
CE_0[12] => Mux51.IN4
CE_0[12] => Add4.IN19
CE_0[12] => LessThan4.IN20
CE_0[12] => Equal2.IN19
CE_0[12] => i~469.DATAB
CE_0[12] => Add2.IN20
CE_0[12] => LessThan1.IN20
CE_0[12] => Equal0.IN19
CE_0[12] => LessThan0.IN20
CE_0[12] => i~51.DATAB
CE_0[12] => i~3.DATAB
CE_0[13] => Mux50.IN2
CE_0[13] => Mux50.IN3
CE_0[13] => Mux50.IN4
CE_0[13] => Add4.IN18
CE_0[13] => LessThan4.IN19
CE_0[13] => Equal2.IN18
CE_0[13] => i~468.DATAB
CE_0[13] => Add2.IN19
CE_0[13] => LessThan1.IN19
CE_0[13] => Equal0.IN18
CE_0[13] => LessThan0.IN19
CE_0[13] => i~50.DATAB
CE_0[13] => i~2.DATAB
CE_0[14] => Mux49.IN2
CE_0[14] => Mux49.IN3
CE_0[14] => Mux49.IN4
CE_0[14] => Add4.IN17
CE_0[14] => LessThan4.IN18
CE_0[14] => Equal2.IN17
CE_0[14] => i~467.DATAB
CE_0[14] => Add2.IN18
CE_0[14] => LessThan1.IN18
CE_0[14] => Equal0.IN17
CE_0[14] => LessThan0.IN18
CE_0[14] => i~49.DATAB
CE_0[14] => i~1.DATAB
CE_0[15] => Mux48.IN2
CE_0[15] => Mux48.IN3
CE_0[15] => Mux48.IN4
CE_0[15] => Add4.IN16
CE_0[15] => LessThan4.IN17
CE_0[15] => Equal2.IN16
CE_0[15] => i~466.DATAB
CE_0[15] => Add2.IN17
CE_0[15] => LessThan1.IN17
CE_0[15] => Equal0.IN16
CE_0[15] => LessThan0.IN17
CE_0[15] => i~48.DATAB
CE_0[15] => i~0.DATAB
CE_1[0] => ~NO_FANOUT~
CE_1[1] => ~NO_FANOUT~
CE_1[2] => ~NO_FANOUT~
CE_1[3] => ~NO_FANOUT~
CE_1[4] => ~NO_FANOUT~
CE_1[5] => ~NO_FANOUT~
CE_1[6] => ~NO_FANOUT~
CE_1[7] => ~NO_FANOUT~
CE_1[8] => ~NO_FANOUT~
CE_1[9] => ~NO_FANOUT~
CE_1[10] => ~NO_FANOUT~
CE_1[11] => ~NO_FANOUT~
CE_1[12] => ~NO_FANOUT~
CE_1[13] => ~NO_FANOUT~
CE_1[14] => ~NO_FANOUT~
CE_1[15] => ~NO_FANOUT~
CE_2[0] => ~NO_FANOUT~
CE_2[1] => ~NO_FANOUT~
CE_2[2] => ~NO_FANOUT~
CE_2[3] => ~NO_FANOUT~
CE_2[4] => ~NO_FANOUT~
CE_2[5] => ~NO_FANOUT~
CE_2[6] => ~NO_FANOUT~
CE_2[7] => ~NO_FANOUT~
CE_2[8] => ~NO_FANOUT~
CE_2[9] => ~NO_FANOUT~
CE_2[10] => ~NO_FANOUT~
CE_2[11] => ~NO_FANOUT~
CE_2[12] => ~NO_FANOUT~
CE_2[13] => ~NO_FANOUT~
CE_2[14] => ~NO_FANOUT~
CE_2[15] => ~NO_FANOUT~
wr_finish => Mux64.IN3
wr_finish => Mux64.IN4
wr_finish => Mux64.IN5
wr_finish => Mux64.IN6
out_sgnl[0] <= out_sgnl[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out_sgnl[1] <= out_sgnl[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
out_sgnl[2] <= gate_t.DB_MAX_OUTPUT_PORT_TYPE