prev_cmp_a8254.map.qmsg

自己编写的8254计数器／计时器

{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cnt_main_part cnt_main_part:a8254_3 " "Info: Elaborating entity \"cnt_main_part\" for hierarchy \"cnt_main_part:a8254_3\"" {  } { { "a8254.vhd" "a8254_3" { Text "D:/gaochao/a8254/a8254/a8254.vhd" 181 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_USED_EXPLICIT_DEFAULT_VALUE" "ce0 cnt_main_part.vhd(40) " "Warning (10540): VHDL Signal Declaration warning at cnt_main_part.vhd(40): used explicit default value for signal \"ce0\" because signal was never assigned a value" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 40 0 0 } }  } 0 10540 "VHDL Signal Declaration warning at %2!s!: used explicit default value for signal \"%1!s!\" because signal was never assigned a value" 0 0 "" 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[21\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[21\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[28\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[28\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[19\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[19\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[17\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[17\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[30\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[30\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[22\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[22\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[24\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[24\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[18\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[18\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[31\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[31\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[20\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[20\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[26\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[26\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[25\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[25\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[27\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[27\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[23\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[23\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "cnt_main_part:a8254_3\|cee\[29\] cnt_main_part:a8254_3\|cee\[16\] " "Info: Duplicate register \"cnt_main_part:a8254_3\|cee\[29\]\" merged to single register \"cnt_main_part:a8254_3\|cee\[16\]\"" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0 "" 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "cnt_main_part:a8254_3\|cee\[16\] data_in GND " "Warning (14130): Reduced register \"cnt_main_part:a8254_3\|cee\[16\]\" with stuck data_in port to stuck value GND" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "cnt_main_part:a8254_3\|j\[0\] data_in GND " "Warning (14130): Reduced register \"cnt_main_part:a8254_3\|j\[0\]\" with stuck data_in port to stuck value GND" {  } { { "cnt_main_part.vhd" "" { Text "D:/gaochao/a8254/a8254/cnt_main_part.vhd" 52 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ICDB_SGATE_CDB_INFO_USING_PWRUP_DC" "mode_reg:a8254_1\|wr_finish~reg0 High " "Info: Power-up level of register \"mode_reg:a8254_1\|wr_finish~reg0\" is not specified -- using power-up level of High to minimize register" {  } { { "mode_reg.vhd" "" { Text "D:/gaochao/a8254/a8254/mode_reg.vhd" 18 -1 0 } }  } 0 0 "Power-up level of register \"%1!s!\" is not specified -- using power-up level of %2!s! to minimize register" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "mode_reg:a8254_1\|wr_finish~reg0 data_in VCC " "Warning (14130): Reduced register \"mode_reg:a8254_1\|wr_finish~reg0\" with stuck data_in port to stuck value VCC" {  } { { "mode_reg.vhd" "" { Text "D:/gaochao/a8254/a8254/mode_reg.vhd" 18 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "3 " "Warning: Design contains 3 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "nRD " "Warning (15610): No output dependent on input pin \"nRD\"" {  } { { "a8254.vhd" "" { Text "D:/gaochao/a8254/a8254/a8254.vhd" 12 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "gate\[1\] " "Warning (15610): No output dependent on input pin \"gate\[1\]\"" {  } { { "a8254.vhd" "" { Text "D:/gaochao/a8254/a8254/a8254.vhd" 13 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "gate\[2\] " "Warning (15610): No output dependent on input pin \"gate\[2\]\"" {  } { { "a8254.vhd" "" { Text "D:/gaochao/a8254/a8254/a8254.vhd" 13 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "" 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "467 " "Info: Implemented 467 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "17 " "Info: Implemented 17 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_OPINS" "3 " "Info: Implemented 3 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0} { "Info" "ICUT_CUT_TM_LCELLS" "447 " "Info: Implemented 447 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 10 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 10 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "164 " "Info: Allocated 164 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Mon Sep 08 18:26:14 2008 " "Info: Processing ended: Mon Sep 08 18:26:14 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:25 " "Info: Elapsed time: 00:00:25" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}