mmx_chp3.htm

MMX即多媒体可扩展指令集

When integrating the MMX technology routine into an application running under an existing operating system (OS), programmers need to take special precautions, similar to those when writing floating-point (FP) code.<br><br>

When an MMX technology instruction executes, the floating-point tag word is marked valid (00s). Subsequent floating-point instructions that will be executed may produce unexpected results because the floating-point stack seems to contain valid data. The EMMS instruction marks the floating-point tag word as empty. Therefore, it is imperative to use the EMMS instruction at the end of every MMX technology routine.<br><br>

The EMMS instruction must be used in each of the following cases:

<ul>
<li>Application utilizing FP instructions calls an MMX technology library/DLL

<li>Application utilizing MMX technology instructions calls a FP library/DLL

<li>Switch between MMX technology code in a task/thread and other tasks/threads in cooperative operating systems.
</ul>

If the EMMS instruction is not used when trying to execute a floating-point instruction, the following may occur:

<ul>
<li> Depending on the exception mask bits of the floating-point control word, a floating- point exception event may be generated.

<li> A &quot;soft exception&quot; may occur. In this case floating-point code continues to execute, but generates incorrect results. This happens when the floating-point exceptions are masked and no visible exceptions occur. The internal exception handler (microcode, not user visible) loads a NaN (Not a Number) with an exponent of 11..11B onto the floating-point stack. The NaN is used for further calculations, yielding incorrect results.

<li> A potential error may occur only if the operating system does NOT manage floating-point context across task switches. These operating systems are usually cooperative operating systems. It is imperative that the EMMS instruction execute at the end of all the MMX technology routines that may enable a task switch immediately after they end execution (explicit yield API or implicit yield API).</ul>

<H4><a name="3.3.3">3.3.3 Interfacing with IA MMX&#153; Technology Procedures and Functions</a></H4>

The MMX technology enables direct access to all the MMX technology registers. This means that all existing interface conventions that apply to the use of other general registers such as EAX, EBX will also apply to the MMX technology register usage.<br><br>

An efficient interface might pass parameters and return values via the pre-defined MMX technology registers, or a combination of memory locations (via the stack) and MMX technology registers. This interface would have to be written in assembly language since passing parameters through MMX technology registers is not currently supported by any existing C compilers. Do not use the EMMS instruction when the interface to the MMX technology code has been defined to retain values in the MMX technology register.<br><br>

If a high-level language, such as C, is used, the data types could be defined as a 64-bit structure with packed data types.

When implementing usage of IA MMX technology instructions in high level languages other approaches can be taken, such as:

<ul>
<li> Passing MMX technology specific parameters to a procedure by passing a pointer to a structure via the integer stack.

<li> Returning a value from a function by returning the pointer to a structure.
</ul>

<H4><a name="3.3.4">3.3.4 Writing Code with IA MMX&#153; Technology and Floating-Point Instructions</a></H4>

The MMX technology aliases the MMX technology registers on the floating-point registers. The main reason for this is to enable MMX technology to be fully compatible and transparent to existing software environments (operating systems and applications). This way operating systems will be able to include new applications and drivers that use the IA MMX technology.<br><br>

An application can contain both floating-point and MMX technology code.  However, the user is discouraged from causing frequent transitions between MMX technology and floating-point instructions by mixing MMX technology code and floating-point code.<br><br>

<b><a name="3.3.4.1">3.3.4.1 RECOMMENDATIONS AND GUIDELINES</a></b><br><br>

Do not mix MMX technology code and floating-point code at the instruction level for the following reasons:

<ul>
<li>The TOS (top of stack) value of the floating-point status word is set to 0 after each MMX technology instruction. This means that the floating-point code loses its pointer to its floating-point registers if the code mixes MMX technology instructions within a floating-point routine.

<li>An MMX technology instruction write to an MMX technology register 64-bit writes ones (11s) to the exponent part of the corresponding floating-point register.

<li>Floating-point code that uses register contents that were generated by the MMX technology instructions may cause floating-point exceptions or incorrect results. These floating-point exceptions are related to undefined floating-point values and floating-point stack usage.

<li>All MMX technology instructions (except EMMS) set the entire tag word to the valid state (00s in all tag fields) without preserving the previous floating-point state.

<li>Frequent transitions between the MMX technology and floating-point instructions may result in significant performance degradation in some implementations.
</ul>

If the application contains floating-point and MMX technology instructions,follow these guidelines:

<ul>
<li>Partition the MMX technology module and the floating-point module into separate instruction streams (separate loops or subroutines) so that they contain only instructions of one type.
<li>Do not rely on register contents across transitions.
<li>When the MMX technology state is not required, empty the MMX technology state using the EMMS instruction.
<li>Exit the floating-point code section with an empty stack.
</ul>


<CENTER><H5><A NAME="X_ExampleTwo">Example 3-2. Floating-point and MMX&#153; Technology Code</A></H5></CENTER>

<pre>
FP_code:	
		..			
		..	(*leave the FP stackempty*)
MMX_code:
		..			
		EMMS	(*mark the FP tag word asempty*)
FP_code 1:
		..			
		..	(*leave the FP stack empty*)
</pre>

<H4><a name="3.3.5">3.3.5 Multitasking Operating System Environment</a></H4>

An application needs to identify the nature of the multitasking operating system on which it runs. Each task retains its own state which must be saved when a task switch occurs. The processor state (context) consists of the integer registers and floating-point and MMX technology registers.<br><br>

Operating systems can be classified into two types:

<ul>
<li>Cooperative multitasking operating system

<li>Preemptive multitasking operating system
</ul>

The behavior of the two operating system types in context switching is described in Section&nbsp;4.1.1.<br><br>

<b><a name="3.3.5.1">3.3.5.1 COOPERATIVE MULTITASKING OPERATING SYSTEM</a></b><br><br>

Cooperative multitasking operating systems do not save the FP or MMX technology state when performing a context switch. Therefore, the application needs to save the relevant state before relinquishing direct or indirect control to the operating system.<br><br>

<b><a name="3.3.5.2">3.3.5.2 PREEMPTIVE MULTITASKING OPERATING SYSTEM</a></b><br><br>

Preemptive multitasking operating systems are responsible for saving and restoring the FP and MMX technology state when performing a context switch. Therefore, the application does not have to save or restore the FP and MMX technology state.

<H4><a name="3.3.6">3.3.6 Exception Handling in IA MMX&#153; Technology Application Code</a></H4>

MMX technology instructions generate the same type of memory-access exceptions as other Intel Architecture instructions. Some examples are: page fault, segment not present, and limit violations. Existing exception handlers can handle these types of exceptions. They do not have to be modified.<br><br>

Unless there is a pending floating-point exception, MMX technology instructions do not generate numeric exceptions. Therefore, there is no need to modify existing exception handlers or add new ones.<br><br>

If a floating-point exception is pending, the subsequent MMX technology instruction generates a numeric error exception (Int 16 and/or FERR#). The MMX technology instruction resumes execution upon return from the exception handler.

<H4><a name="3.3.7">3.3.7 Register Mapping</a></H4>

The IA MMX technology registers and their tags are mapped to physical locations of the floating-point registers and their tags. Register aliasing and mapping is described in more detail in Section 4.3.1.

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