📄 mmx_chp5.htm
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IF mm(63..56) > mm/m64(63..56)<BR>
THEN mm(63..56)<--0xFF;<BR>
ELSE mm(63..56)<--0; <BR>
}<BR>
ELSE IF instruction is PCMPGTW<BR>
THEN {<BR>
IF mm(15..0) > mm/m64(15..0)<BR>
THEN mm(15..0)<--0xFFFF;<BR>
ELSE mm(15..0)<--0;<BR>
IF mm(31..16) > mm/m64(31..16)<BR>
THEN mm(31..16)<--0xFFFF;<BR>
ELSE mm(31..16)<--0;<BR>
...<BR>
IF mm(63..48) > mm/m64(63..48)<BR>
THEN mm(63..48)<--0xFFFF;<BR>
ELSE mm(63..48)<--0;<BR>
}<BR>
ELSE { (* instruction is PCMPGTD *)<BR>
IF mm(31..0) > mm/m64(31..0)<BR>
THEN mm(31..0)<--0xFFFFFFFF; <BR>
ELSE mm(31..0)<--0;<BR>
IF mm(63..32) > mm/m64(63..32)<BR>
THEN mm(63..32)<--0xFFFFFFFF;<BR>
ELSE mm(63..32)<--0;<BR>
}<br><br>
<B>Description</B><br><br>
The PCMPGT instructions compare the signed data elements
in the destination operand to the signed data elements in the
source operand. If the signed data elements in the destination
register are greater than those in the source operand, the corresponding
data element in the destination operand is set to all ones. Otherwise,
it is set to all zeros.<br><br>
The destination operand is an MMX register. The source
operand can either be an MMX register or a 64-bit memory operand.<br><br>
The PCMPGTB instruction compares the signed bytes
in the destination operand to the corresponding signed bytes in
the source operand. The bytes in the destination register are
set accordingly.<br><br>
The PCMPGTW instruction compares the signed words
in the destination operand to the corresponding signed words in
the source operand. The words in the destination register are
set accordingly.<br><br>
The PCMPGTD instruction compares the signed doublewords
in the destination operand to the corresponding signed doublewords
in the source operand. The doublewords in the destination register
are set accordingly.<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006021.gif" tppabs="http://freemind.163.net/database/mmx/3006021.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) for an illegal memory operand effective address
in the CS, DS, ES, FS or GS segments; #SS(0) for an illegal address
in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned
memory reference if the current privilege level is 3; #UD if CR0.EM
= 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception.<br><br>
<B>Real Address Mode Exceptions</B><br><br>
Interrupt 13 if any part of the operand lies outside
of the effective address space from 0 to 0FFFFH;<B> </B>#UD if
CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending
FPU exception.<br><br>
<B>Virtual 8086 Mode Exceptions</B><br><br>
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault; #AC for unaligned memory reference.<br><br>
<table border="0" width="100%"><tr><td bgcolor="#CBBA9E" height="1"></td></tr></table>
<H5><a name="PMADDWD">PMADDWD - Packed Multiply and Add</a></H5>
<center><table border="0" cellpadding="2" cellspacing="1" bgcolor="#EBDABE">
<TR><TD bgcolor="#000000" WIDTH=106><small><B>Opcode</small></B></TD><TD bgcolor="#000000" WIDTH=123><small><B>Instruction</small></B>
</TD><TD bgcolor="#000000" WIDTH=288><small><B>Description</small></B></TD>
</TR>
<TR><TD bgcolor="#000000" WIDTH=106><small>0F F5 /r</small></TD><TD bgcolor="#000000" WIDTH=123><small>PMADDWD <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Multiply the packed word in MMX register by the packed word in MMX reg/memory. Add the 32-bit results pairwise and store in MMX register as dword</small>
</TD></TR>
</TABLE></CENTER>
<br>
<B>Operation</B><br><br>
mm(31..0)<--mm(15..0) * mm/m64(15..0) + mm(31..16) * mm/m64(31..16);<BR>
mm(63..32)<--mm(47..32) * mm/m64(47..32) + mm(63..48) * mm/m64(63..48);<br><br>
<B>Description</B><br><br>
The PMADDWD instruction multiplies the four signed
words of the destination operand by the four signed words of the
source operand. The result is two 32-bit doublewords. The two
high-order words are summed and stored in the upper doubleword
of the destination operand. The two low-order words are summed
and stored in the lower doubleword of the destination operand.
This result is written to the destination operand.<br><br>
The destination operand is an MMX register. The source
operand can either be an MMX register or a 64-bit memory operand.<br><br>
The PMADDWD instruction wraps around to 0x80000000
only when all four words of both the source and destination operands
are 0x8000.<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006023.gif" tppabs="http://freemind.163.net/database/mmx/3006023.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) for an illegal memory operand effective address
in the CS, DS, ES, FS or GS segments; #SS(0) for an illegal address
in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned
memory reference if the current privilege level is 3; #UD if CR0.EM
= 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception.<br><br>
<B>Real Address Mode Exceptions</B><br><br>
Interrupt 13 if any part of the operand lies outside
of the effective address space from 0 to 0FFFFH;<B> </B>#UD if
CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending
FPU exception.<br><br>
<B>Virtual 8086 Mode Exceptions</B><br><br>
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault; #AC for unaligned memory reference.<br><br>
<table border="0" width="100%"><tr><td bgcolor="#CBBA9E" height="1"></td></tr></table>
<H5><a name="PMULHW">PMULHW - Packed Multiply High</a></H5>
<center><table border="0" cellpadding="2" cellspacing="1" bgcolor="#EBDABE">
<TR><TD bgcolor="#000000" WIDTH=107><small><B>Opcode</small></B></TD><TD bgcolor="#000000" WIDTH=124><small><B>Instruction</small></B>
</TD><TD bgcolor="#000000" WIDTH=298><small><B>Description</small></B></TD>
</TR>
<TR><TD bgcolor="#000000" WIDTH=107><small>0F E5 /r</small></TD><TD bgcolor="#000000" WIDTH=124><small>PMULHW <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=298><small>Multiply the signed packed word in MMX register with the signed packed word in MMX reg/memory, then store the high-order 16 bits of the results in MMX register. </small>
</TD></TR>
</TABLE></CENTER>
<br>
<B>Operation</B><br><br>
mm(15..0)<--(mm(15..0) * mm/m64(15..0) ) (31..16);<BR>
mm(31..16)<--(mm(31..16) * mm/m64(31..16) ) (31..16);<BR>
mm(47..32)<--(mm(47..32) * mm/m64(47..32) ) (31..16);<BR>
mm(63..48)<--(mm(63..48) * mm/m64(63..48) ) (31..16);<br><br>
<B>Description</B><br><br>
The PMULHW instruction multiplies the four signed
words of the destination operand with the four signed words of
the source operand. The high-order 16 bits of the 32-bit intermediate
results are written to the destination operand.<br><br>
The destination operand is an MMX register. The source
operand can either be an MMX register or a 64-bit memory operand.<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006022.gif" tppabs="http://freemind.163.net/database/mmx/3006022.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) for an illegal memory operand effective address
in the CS, DS, ES, FS or GS segments; #SS(0) for an illegal address
in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned
memory reference if the current privilege level is 3; #UD if CR0.EM
= 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception.<br><br>
<B>Real Address Mode Exceptions</B><br><br>
Interrupt 13 if any part of the operand lies outside
of the effective address space from 0 to 0FFFFH;<B> </B>#UD if
CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending
FPU exception.<br><br>
<B>Virtual 8086 Mode Exceptions</B><br><br>
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault; #AC for unaligned memory reference.<br><br>
<table border="0" width="100%"><tr><td bgcolor="#CBBA9E" height="1"></td></tr></table>
<H5><a name="PMULLW">PMULLW - Packed Multiply Low</a></H5>
<center><table border="0" cellpadding="2" cellspacing="1" bgcolor="#EBDABE">
<TR><TD bgcolor="#000000" WIDTH=103><small><B>Opcode</small></B></TD><TD bgcolor="#000000" WIDTH=120><small><B>Instruction</small></B>
</TD><TD bgcolor="#000000" WIDTH=288><small><B>Description</small></B></TD>
</TR>
<TR><TD bgcolor="#000000" WIDTH=103><small>0F D5 /r</small></TD><TD bgcolor="#000000" WIDTH=120><small>PMULLW <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Multiply the packed word in MMX register with the packed word in MMX reg/memory, then store the low-order 16 bits of the results in MMX register.</small>
</TD></TR>
</TABLE></CENTER>
<br>
<B>Operation</B><br><br>
mm(15..0)<--(mm(15..0) * mm/m64(15..0) ) (15..0);<BR>
mm(31..16)<--(mm(31..16) * mm/m64(31..16) ) (15..0);<BR>
mm(47..32)<--(mm(47..32) * mm/m64(47..32) ) (15..0);<BR>
mm(63..48)<--(mm(63..48) * mm/m64(63..48) ) (15..0);<br><br>
<B>Description</B><br><br>
The PMULLW instruction multiplies the four signed
or unsigned words of the destination operand with the four signed
or unsigned words of the source operand. The low-order 16 bits
of the 32-bit intermediate results are written to the destination
operand.<br><br>
The destination operand is an MMX register. The source
operand can either be an MMX register or a 64-bit memory operand.<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006025.gif" tppabs="http://freemind.163.net/database/mmx/3006025.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) for an illegal memory operand effective address
in the CS, DS, ES, FS or GS segments; #SS(0) for an illegal address
in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned
memory reference if the current privilege level is 3; #UD if CR0.EM
= 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception.<br><br>
<B>Real Address Mode Exceptions</B><br><br>
Interrupt 13 if any part of the operand lies outside of the effective address space from 0 to 0FFFFH; #UD if CR0.EM = 1; #NM if TS bit in C⌨️ 快捷键说明
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