📄 mmx_chp5.htm
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mm(15..8)<--mm(15..8) + mm/m64(15..8);<BR>
mm(23..16)<--mm(23..16)+ mm/m64(23..16);<BR>
mm(31..24)<--mm(31..24) + mm/m64(31..24);<BR>
mm(39..32)<--mm(39..32) + mm/m64(39..32);<BR>
mm(47..40)<--mm(47..40)+ mm/m64(47..40);<BR>
mm(55..48)<--mm(55..48) + mm/m64(55..48);<BR>
mm(63..56)<--mm(63..56) + mm/m64(63..56);<BR>
}<br><br>
IF instruction is PADDW<BR>
THEN {<BR>
mm(15..0)<--mm(15..0) + mm/m64(15..0);<BR>
mm(31..16)<--mm(31..16) + mm/m64(31..16);<BR>
mm(47..32)<--mm(47..32) + mm/m64(47..32);<BR>
mm(63..48)<--mm(63..48) + mm/m64(63..48);<BR>
}<BR>
ELSE { (* instruction is PADDD *)<BR>
mm(31..0)<--mm(31..0) + mm/m64(31..0);<BR>
mm(63..32)<--mm(63..32) + mm/m64(63..32);<BR>
}<br><br>
<B>Description</B><br><br>
The PADD instructions add the data elements of the
source operand to the data elements of the destination register.
The result is written to the destination register. If the result
exceeds the data-range limit for the data type, it wraps around.<br><br>
The destination operand is an MMX register. The source
operand can either be an MMX register or a 64-bit memory operand.<br><br>
The PADDB instruction adds the bytes of the source
operand to the bytes of the destination operand and writes the
results to the MMX register. When the result is too large to be
represented in a packed byte (overflow), the result wraps around
and the lower 8 bits are written to the destination register.<br><br>
The PADDW instruction adds the words of the source
operand to the words of the destination operand and writes the
results to the MMX register. When the result is too large to be
represented in a packed word (overflow), the result wraps around
and the lower 16 bits are written to the destination register.<br><br>
The PADDD instruction adds the doublewords of the
source operand to the doublewords of the destination operand and
writes the results to the MMX register. When the result is too
large to be represented in a packed doubleword (overflow), the
result wraps around and the lower 32 bits are written to the destination
register.<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006015.gif" tppabs="http://freemind.163.net/database/mmx/3006015.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) for an illegal memory operand effective address
in the CS, DS, ES, FS or GS segments; #SS(0) for an illegal address
in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned
memory reference if the current privilege level is 3; #UD if CR0.EM
= 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception.<br><br>
<B>Real Address Mode Exceptions</B><br><br>
Interrupt 13 if any part of the operand lies outside
of the effective address space from 0 to 0FFFFH;<B> </B>#UD if
CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending
FPU exception.<br><br>
<B>Virtual 8086 Mode Exceptions</B><br><br>
Same exceptions as in Real Address Mode; #PF(fault-code)
for a page fault; #AC for unaligned memory reference.<br><br>
<table border="0" width="100%"><tr><td bgcolor="#CBBA9E" height="1"></td></tr></table>
<H5><a name="PADDSB">PADDSB/PADDSW - Packed Add with Saturation</a></H5>
<center><table border="0" cellpadding="2" cellspacing="1" bgcolor="#EBDABE">
<TR><TD bgcolor="#000000" WIDTH=103><small><B>Opcode</small></B></TD><TD bgcolor="#000000" WIDTH=120><small><B>Instruction</small></B>
</TD><TD bgcolor="#000000" WIDTH=288><small><B>Description</small></B></TD>
</TR>
<TR><TD bgcolor="#000000" WIDTH=103><small>0F EC /r</small></TD><TD bgcolor="#000000" WIDTH=120><small>PADDSB <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Add signed packed byte from MMX register/memory to signed packed byte in MMX register and saturate.</small>
</TD></TR>
<TR><TD bgcolor="#000000" WIDTH=103><small>0F ED /r</small></TD><TD bgcolor="#000000" WIDTH=120><small>PADDSW <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Add signed packed word from MMX register/memory to signed packed word in MMX register and saturate.</small>
</TD></TR>
</TABLE></center>
<br>
<B>Operation</B><br><br>
IF instruction is PADDSB<BR>
THEN {<BR>
mm(7..0)<--SaturateToSignedByte (mm(7..0) + mm/m64 (7..0));<br>
mm(15..8)<--SaturateToSignedByte (mm(15..8) + mm/m64(15..8));<BR>
mm(23..16)<--SaturateToSignedByte (mm(23..16) + mm/m64(23..16));<BR>
mm(31..24)<--SaturateToSignedByte (mm(31..24) + mm/m64(31..24));<BR>
mm(39..32)<--SaturateToSignedByte (mm(39..32) + mm/m64(39..32));<BR>
mm(47..40)<--SaturateToSignedByte (mm(47..40) + mm/m64(47..40));<BR>
mm(55..48)<--SaturateToSignedByte (mm(55..48) + mm/m64(55..48));<BR>
mm(63..56)<--SaturateToSignedByte (mm(63..56) + mm/m64(63..56));<BR>
}<br>
ELSE { (* instruction is PADDSW *)<BR>
mm(15..0)<--SaturateToSignedWord (mm(15..0) + mm/m64(15..0));<BR>
mm(31..16)<--SaturateToSignedWord (mm(31..16) + mm/m64(31..16));<BR>
mm(47..32)<--SaturateToSignedWord (mm(47..32) + mm/m64(47..32));<BR>
mm(63..48)<--SaturateToSignedWord (mm(63..48) + mm/m64(63..48));<BR>
}<br><br>
<B>Description</B><br><br>
The PADDS instructions add the packed signed data
elements of the source operand to the packed signed data elements
of the destination operand and saturate the result. The result
is written to the destination operand.<br><br>
The destination operand is an MMX register. The source operand can either be an MMX register or a 64-bit memory operand.<br><br>
The PADDSB instruction adds the signed bytes of the
source operand to the signed bytes of the destination operand
and writes the results to the MMX register. If the result is larger
or smaller than the range of a signed byte, the value is saturated
(in the case of an overflow - to 0x7F, and in the case of an underflow
- to 0x80).<br><br>
The PADDSW instruction adds the signed words of the
source operand to the signed words of the destination operand
and writes the results to the MMX register. If the result is larger
or smaller than the range of a signed word, the value is saturated
(in the case of an overflow - to 0x7FFF, and in the case of an
underflow - to 0x8000) .<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006016.gif" tppabs="http://freemind.163.net/database/mmx/3006016.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) for an illegal memory operand effective address
in the CS, DS, ES, FS or GS segments; #SS(0) for an illegal address
in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned
memory reference if the current privilege level is 3; #UD if CR0.EM
= 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception.<br><br>
<B>Real Address Mode Exceptions </B><br><br>
Interrupt 13 if any part of the operand lies outside
of the effective address space from 0 to 0FFFFH;<B> </B>#UD if
CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending
FPU exception.<br><br>
<B>Virtual 8086 Mode Exceptions</B><br><br>
Same exceptions as in Real Address Mode; #PF(fault-code)
for a page fault; #AC for unaligned memory reference.<br><br>
<table border="0" width="100%"><tr><td bgcolor="#CBBA9E" height="1"></td></tr></table>
<H5><a name="PADDUSB">PADDUSB/PADDUSW - Packed Add Unsigned with Saturation</a></H5>
<center><table border="0" cellpadding="2" cellspacing="1" bgcolor="#EBDABE">
<TR><TD bgcolor="#000000" WIDTH=103><small><B>Opcode</small></B></TD><TD bgcolor="#000000" WIDTH=120><small><B>Instruction</small></B>
</TD><TD bgcolor="#000000" WIDTH=288><small><B>Description</small></B></TD>
</TR>
<TR><TD bgcolor="#000000" WIDTH=103><small>0F DC /r</small></TD><TD bgcolor="#000000" WIDTH=120><small>PADDUSB <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Add unsigned packed byte from MMX register/memory to unsigned packed byte in MMX register and saturate.</small>
</TD></TR>
<TR><TD bgcolor="#000000" WIDTH=103><small>0F DD /r</small></TD><TD bgcolor="#000000" WIDTH=120><small>PADDUSW <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Add unsigned packed word from MMX register/memory to unsigned packed word in MMX register and saturate.</small>
</TD></TR>
</TABLE></CENTER>
<br>
<B>Operation</B><br><br>
IF instruction is PADDUSB<BR>
THEN {<BR>
mm(7..0)<--SaturateToUnsignedByte (mm(7..0) + mm/m64 (7..0));<br>
mm(15..8)<--SaturateToUnsignedByte (mm(15..8) + mm/m64(15..8));<BR>
mm(23..16)<--SaturateToUnsignedByte (mm(23..16) + mm/m64(23..16));<BR>
mm(31..24)<--SaturateToUnsignedByte (mm(31..24) + mm/m64(31..24));<BR>
mm(39..32)<--SaturateToUnsignedByte (mm(39..32) + mm/m64(39..32));<BR>
mm(47..40)<--SaturateToUnsignedByte (mm(47..40) + mm/m64(47..40));<BR>
mm(55..48)<--SaturateToUnsignedByte (mm(55..48) + mm/m64(55..48));<BR>
mm(63..56)<--SaturateToUnsignedByte (mm(63..56) + mm/m64(63..56));<BR>
}<br>
ELSE { (* instruction is PADDUSW *)<BR>
mm(15..0)<--SaturateToUnsignedWord (mm(15..0) + mm/m64(15..0));<BR>
mm(31..16)<--SaturateToUnsignedWord (mm(31..16) + mm/m64(31..16));<BR>
mm(47..32)<--SaturateToUnsignedWord (mm(47..32) + mm/m64(47..32));<BR>
mm(63..48)<--SaturateToUnsignedWord (mm(63..48) + mm/m64(63..48));<BR>
}<br><br>
<B>Description</B><br><br>
The PADDUS instructions add the packed unsigned data
elements of the source operand to the packed unsigned data elements
of the destination operand and saturate the results. The results
are written to the destination operand.<br><br>
The destination operand is an MMX register. The source operand can either be an MMX register or a 64-bit memory operand.<br><br>
The PADDUSB instruction adds the unsigned bytes of
the source operand to the unsigned bytes of the destination operand
and writes the results to the MMX register. When the result is
larger than the range of an unsigned byte (overflow), the value
is saturated to 0xFF. When the result is smaller than the range
of an unsigned byte (underflow), the value is saturated to 0x00.<br><br>
The PADDUSW instruction adds the unsigned words of
the source operand to the unsigned words of the destination operand
and writes the results to the MMX register. When the result is
larger than the range of an unsigned word (overflow), the value
is saturated to 0xFFFF. When the result is smaller than the range
of an unsigned word (underflow), the value is saturated to 0x0000.<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006017.gif" tppabs="http://freemind.163.net/database/mmx/3006017.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) for an illegal memory operand effective address
in the CS, DS, ES, FS or GS segments; #SS(0) for an illegal address
in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned
memory reference if the current privilege level is 3; #UD if CR0.EM
= 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception.<br><br>
<B>Real Address Mode Exceptions</B><br><br>
Interrupt 13 if any part of the operand lies outside
of the effective address space from 0 to 0FFFFH;<B> </B>#UD if
CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending
FPU exception.<br><br>
<B>Virtual 8086 Mode Exceptions</B><br><br>
Same exceptions as in Real Address Mode; #PF(fault-code)
for a page fault; #AC for unaligned memory reference.<br><br>
<table border="0" width="100%"><tr><td bgcolor="#CBBA9E" height="1"></td></tr></table>
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