📄 mmx_chp5.htm
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<TR><TD bgcolor="#000000" WIDTH=103><small>0F 7E /r</small></TD><TD bgcolor="#000000" WIDTH=120><small>MOVD <I>r/m32, mm</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Move 32 bits from MMX register to integer register/memory.</small>
</TD></TR>
</table></center>
<br>
<B>Operation</B><br><br>
IF destination = mm<BR>
THEN<BR>
mm(63..0)<--ZeroExtend(r/m32);<BR>
ELSE<BR>
r/m32<--mm(31..0);<br><br>
<B>Description</B><br><br>
The MOVD instruction copies 32 bits from the source operand to the destination operand.<br><br>
The destination and source operands can be either MMX registers, 32-bit memory operands, or 32-bit integer registers. The MOVD cannot transfer data from an MMX register to an MMX register, from memory to memory, or from an integer register to an integer register.<br><br>
When the destination operand is an MMX register, the 32-bit source operand is written to the low-order 32 bits of the 64-bit destination register. The destination register is zero-extended to 64 bits.<br><br>
When the source operand is an MMX register, the low-order 32 bits of the MMX register are written to the 32-bit integer register or 32-bit memory location.<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006010.gif" tppabs="http://freemind.163.net/database/mmx/3006010.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) if the destination is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned memory reference if the current privilege level is 3; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU exception.<br><br>
<B>Real Address Mode Exceptions</B><br><br>
Interrupt 13 if any part of the operand lies outside of the effective address space from 0 to 0FFFFFH; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU exception.<br><br>
<B>Virtual 8086 Mode Exceptions</B><br><br>
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault; #AC for unaligned memory reference.<br><br>
<table border="0" width="100%"><tr><td bgcolor="#CBBA9E" height="1"></td></tr></table>
<H5><a name="MOVQ">MOVQ - Move 64 Bits</a></H5>
<center><table border="0" cellpadding="2" cellspacing="1" bgcolor="#EBDABE">
<TR><TD bgcolor="#000000" WIDTH=103><small><B>Opcode</small></B></TD><TD bgcolor="#000000" WIDTH=120><small><B>Instruction</small></B>
</TD><TD bgcolor="#000000" WIDTH=288><small><B>Description</small></B></TD>
</TR>
<TR><TD bgcolor="#000000" WIDTH=103><small>0F 6F /r</small></TD><TD bgcolor="#000000" WIDTH=120><small>MOVQ <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Move 64 bits from MMX register/memory to MMX register.</small>
</TD></TR>
<TR><TD bgcolor="#000000" WIDTH=103><small>0F 7F /r</small></TD><TD bgcolor="#000000" WIDTH=120><small>MOVQ <I>mm/m64, mm</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Move 64 bits from MMX register to MMX register/memory.</small>
</TD></TR>
</table></center>
<br>
<B>Operation</B><br><br>
IF destination = mm<BR>
THEN<BR>
mm<--mm/m64;<BR>
ELSE<BR>
mm/m64<--mm;<br><br>
<B>Description</B><br><br>
The MOVQ instruction copies 64 bits from the source operand to the destination operand.<br><br>
The destination and source operands can be either MMX registers or 64-bit memory operands. The MOVQ instruction cannot transfer data from memory to memory.<br><br>
When the destination is an MMX register and the source is a 64-bit memory operand, the 64 bits of data at the memory location are copied into the MMX register.<br><br>
When the destination is a 64-bit memory operand and the source is an MMX register, the 64 bits of data are copied from the MMX register into the memory location.<br><br>
When the destination and source are both MMX registers, the contents of the MMX register (source) are copied into an MMX register (destination).<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006013.gif" tppabs="http://freemind.163.net/database/mmx/3006013.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) if the destination is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned memory reference if the current privilege level is 3; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU exception.<br><br>
<B>Real Address Mode Exceptions</B><br><br>
Interrupt 13 if any part of the operand lies outside of the effective address space from 0 to 0FFFFFH; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU exception.<br><br>
<B>Virtual 8086 Mode Exceptions</B><br><br>
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault; #AC for unaligned memory reference.<br><br>
<table border="0" width="100%"><tr><td bgcolor="#CBBA9E" height="1"></td></tr></table>
<H5><a name="PACKSSWB">PACKSSWB/PACKSSDW - Pack with Signed Saturation</a></H5>
<center><table border="0" cellpadding="2" cellspacing="1" bgcolor="#EBDABE">
<TR><TD bgcolor="#000000" WIDTH=92><small><B>Opcode</small></B></TD><TD bgcolor="#000000" WIDTH=131><small><B>Instruction</small></B>
</TD><TD bgcolor="#000000" WIDTH=288><small><B>Description</small></B></TD>
</TR>
<TR><TD bgcolor="#000000" WIDTH=92><small>0F 63 /r</small></TD><TD bgcolor="#000000" WIDTH=131><small>PACKSSWB <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Pack and saturate signed words from MMX register and MMX register/memory into signed bytes in MMX register.</small>
</TD></TR>
<TR><TD bgcolor="#000000" WIDTH=92><small>0F 6B /r</small></TD><TD bgcolor="#000000" WIDTH=131><small>PACKSSDW <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Pack and saturate signed dwords from MMX register and MMX register/memory into signed words in MMX register.</small>
</TD></TR>
</table></center>
<br>
<B>Operation</B><br><br>
IF instruction is PACKSSWB<BR>
THEN {<BR>
mm(7..0)<--SaturateSignedWordToSignedByte mm(15..0);<BR>
mm(15..8)<--SaturateSignedWordToSignedByte mm(31..16);<BR>
mm(23..16)<--SaturateSignedWordToSignedByte mm(47..32);<BR>
mm(31..24)<--SaturateSignedWordToSignedByte mm(63..48);<BR>
mm(39..32)<--SaturateSignedWordToSignedByte mm/m64(15..0);<BR>
mm(47..40)<--SaturateSignedWordToSignedByte mm/m64(31..16);<BR>
mm(55..48)<--SaturateSignedWordToSignedByte mm/m64(47..32);<BR>
mm(63..56)<--SaturateSignedWordToSignedByte mm/m64(63..48);<BR>
}<BR>
ELSE { (* instruction is PACKSSDW *)<BR>
mm(15..0)<--SaturateSignedDwordToSignedWord mm(31..0); <BR>
mm(31..16)<--SaturateSignedDwordToSignedWord mm(63..32);<BR>
mm(47..32)<--SaturateSignedDwordToSignedWord mm/m64(31..0);<BR>
mm(63..48)<--SaturateSignedDwordToSignedWord mm/m64(63..32);<BR>
}<br><br>
<B>Description</B><br><br>
The PACKSS instruction packs and saturates the signed data elements from the source and the destination operands and writes the signed results to the destination operand.<br><br>
The destination operand is an MMX register. The source operand can either be an MMX register or a 64-bit memory operand.<br><br>
The PACKSSWB instruction packs four signed words from the source operand and four signed words from the destination operand into eight signed bytes in the destination register. If the signed value of a word is larger or smaller than the range of a signed byte, the value is saturated (in the case of an overflow - to 0x7F, and in the case of an underflow - to 0x80).<br><br>
The PACKSSDW instruction packs two signed doublewords from the source operand and two signed doublewords from the destination operand into four signed words in the destination register. If the signed value of a doubleword is larger or smaller than the range of a signed word, the value is saturated (in the case of an overflow - to 0x7FFF, and in the case of an underflow - to 0x8000).<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006012.gif" tppabs="http://freemind.163.net/database/mmx/3006012.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) for an illegal memory operand effective address
in the CS, DS, ES, FS or GS segments; #SS(0) for an illegal address
in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned
memory reference if the current privilege level is 3; #UD if CR0.EM
= 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception.<br><br>
<B>Real Address Mode Exceptions</B><br><br>
Interrupt 13 if any part of the operand lies outside
of the effective address space from 0 to 0FFFFH;<B> </B>#UD if
CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending
FPU exception.<br><br>
<B>Virtual 8086 Mode Exceptions</B><br><br>
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault; #AC for unaligned memory reference.<br><br>
<table border="0" width="100%"><tr><td bgcolor="#CBBA9E" height="1"></td></tr></table>
<H5><a name="PACKUSWB">PACKUSWB - Pack with Unsigned Saturation</a></H5>
<center><table border="0" cellpadding="2" cellspacing="1" bgcolor="#EBDABE">
<TR><TD bgcolor="#000000" WIDTH=92><small><B>Opcode</small></B></TD><TD bgcolor="#000000" WIDTH=131><small><B>Instruction</small></B>
</TD><TD bgcolor="#000000" WIDTH=288><small><B>Description</small></B></TD>
</TR>
<TR><TD bgcolor="#000000" WIDTH=92><small>0F 67 /r</small></TD><TD bgcolor="#000000" WIDTH=131><small>PACKUSWB <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Pack and saturate signed words from MMX register and MMX register/memory into unsigned bytes in MMX register.</small>
</TD></TR>
</TABLE></center>
<br>
<B>Operation</B><br><br>
mm(7..0)<--SaturateSignedWordToUnsignedByte mm(15..0);<BR>
mm(15..8)<--SaturateSignedWordToUnsignedByte mm(31..15);<BR>
mm(23..16)<--SaturateSignedWordToUnsignedByte mm(47..32);<BR>
mm(31..24)<--SaturateSignedWordToUnsignedByte mm(63..48);<BR>
mm(39..32)<--SaturateSignedWordToUnsignedByte mm/m64(15..0);<BR>
mm(47..40)<--SaturateSignedWordToUnsignedByte mm/m64(31..16);<BR>
mm(55..48)<--SaturateSignedWordToUnsignedByte mm/m64(47..32);<BR>
mm(63..56)<--SaturateSignedWordToUnsignedByte mm/m64(63..48);<br><br>
<B>Description:</B><br><br>
The PACKUSWB packs and saturates four signed words of the source operand and four signed words of the destination operand into eight unsigned bytes. The result is written to the destination operand.<br><br>
The destination operand is an MMX register. The source operand can either be an MMX register or a 64-bit memory operand.<br><br>
If the signed value of the word is larger or smaller than the range of an unsigned byte, the value is saturated (in the case of an overflow - to 0xFF and in the case of an underflow - to 0x00).<br><br>
<B>Example</B><br><br>
<CENTER><IMG SRC="3006014.gif" tppabs="http://freemind.163.net/database/mmx/3006014.gif" border=0></CENTER><br>
<B>Flags Affected</B><br><br>
None.<br><br>
<B>Protected Mode Exceptions</B><br><br>
#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault; #AC for unaligned memory reference if the current privilege level is 3; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU exception.<br><br>
<B>Real Address Mode Exceptions</B><br><br>
Interrupt 13 if any part of the operand lies outside of the effective address space from 0 to 0FFFFH; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU exception.<br><br>
<B>Virtual 8086 Mode Exceptions</B><br><br>
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault; #AC for unaligned memory reference.<br><br>
<table border="0" width="100%"><tr><td bgcolor="#CBBA9E" height="1"></td></tr></table>
<H5><a name="PADDB">PADDB/PADDW/PADDD-</small>Packed Add</a></H5>
<center><table border="0" cellpadding="2" cellspacing="1" bgcolor="#EBDABE">
<TR><TD bgcolor="#000000" WIDTH=103><small><B>Opcode</small></B></TD><TD bgcolor="#000000" WIDTH=120><small><B>Instruction</small></B>
</TD><TD bgcolor="#000000" WIDTH=288><small><B>Description</small></B></TD>
</TR>
<TR><TD bgcolor="#000000" WIDTH=103><small>0F FC /r</small></TD><TD bgcolor="#000000" WIDTH=120><small>PADDB <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Add packed byte from MMX register/memory to packed byte in MMX register.</small>
</TD></TR>
<TR><TD bgcolor="#000000" WIDTH=103><small>0F FD /r</small></TD><TD bgcolor="#000000" WIDTH=120><small>PADDW <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Add packed word from MMX register/memory to packed word in MMX register.</small>
</TD></TR>
<TR><TD bgcolor="#000000" WIDTH=103><small>0F FE /r</small></TD><TD bgcolor="#000000" WIDTH=120>PADDD <I>mm, mm/m64</I></small>
</TD><TD bgcolor="#000000" WIDTH=288><small>Add packed dword from MMX register/memory to packed dword in MMX register.</small>
</TD></TR>
</TABLE></center>
<br>
<B>Operation</B><br><br>
IF instruction is PADDB<BR>
THEN {<BR>
mm(7..0)<--mm(7..0) + mm/m64(7..0); <BR>
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