dds.tan.rpt
来自「基于VHDL+FPGA的DDS信号发生设计」· RPT 代码 · 共 223 行 · 第 1/5 页
RPT
223 行
+-----------------------------------------+-----------------------------------------------------+---------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg0 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg1 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg2 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg3 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg4 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg5 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg6 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg7 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg8 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg9 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg10 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a0~porta_address_reg11 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[0] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg0 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg1 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg2 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg3 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg4 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg5 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg6 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg7 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg8 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg9 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg10 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a1~porta_address_reg11 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[1] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg0 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg1 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg2 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg3 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg4 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg5 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg6 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg7 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg8 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg9 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg10 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a2~porta_address_reg11 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[2] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a3~porta_address_reg0 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[3] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a3~porta_address_reg1 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[3] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a3~porta_address_reg2 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[3] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a3~porta_address_reg3 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[3] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a3~porta_address_reg4 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[3] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a3~porta_address_reg5 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[3] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a3~porta_address_reg6 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[3] ; clk ; clk ; None ; None ; 4.319 ns ;
; N/A ; 197.01 MHz ( period = 5.076 ns ) ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|ram_block1a3~porta_address_reg7 ; rom:u2|altsyncram:altsyncram_component|altsyncram_5i31:auto_generated|q_a[3] ; clk ; clk ; None ; None ; 4.319 ns ;
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